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MB15C700PV View Datasheet(PDF) - Fujitsu

Part Name
Description
Manufacturer
MB15C700PV Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MB15C700 series
s BLOCK DIAGRAM
PLLVDD 10
OSCin 8
PLLPS 16
PLLfin 15
PLLGND 14
Buffer Amp.
Power saving
control circuit
Reference counter (R)
Phase
comparator
PLL-Block
Buffer Amp.
Swallow counter (A) Main counter (N)
Prescaler (P)
Control
circuit
Lock
detector
Output
selector
Charge pump
VCO-Block
6 LD
9 fout
13 PLLDo
3 VCOCNT
19 VCOTNKI
20 VCOTNKO
18 VCOout
5
14 4
VCOVDD VCOPS
VCOGND
s FUNCTIONAL DESCRIPTIONS
Divide ratios of the internal counters can be set optionally according to customer requirements.
The divide ratio can be calculated using the following equation.
fvco = [ (P × N + A) ] × fosc / R
Note: N > A, P > A
fvco : Output frequency of Voltage Controlled Oscillator (VCOout up to 400 MHz)
fosc : Reference oscillation frequency (up to 26 MHz)
N
: Divide ratio of the main counter (5 to 4095)
A
: Divide ratio of the swallow counter (0 to 31)
P
: Preset divide ratio of dual modulus prescaler (8/9, 16/17, 32/33)
R
: Divide ratio of the reference counter (5 to 4095)
4

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