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HM64YGB36100 View Datasheet(PDF) - Renesas Electronics

Part Name
Description
Manufacturer
HM64YGB36100 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HM64YGB36100 Series
AC Characteristics
(Ta = 0 to +85°C, VDD = 2.5 V ± 5%)
Single Differential Clock Register-Register Mode
HM64YGB36100BP
Parameter
Symbol
-33
Min
Max
Unit Notes
CK clock cycle time
CK clock high width
CK clock low width
Address setup time
Data setup time
Address hold time
Data hold time
Clock high to output valid
Clock high to output hold
Clock high to output low-Z (SS control)
Clock high to output high-Z
Output enable low to output low-Z
Output enable low to output valid
Output enable high to output high-Z
Sleep mode recovery time
Sleep mode enable time
Notes: 1. See figure in ”AC Test Conditions”.
tKHKH
tKHKL
tKLKH
tAVKH
tDVKH
tKHAX
tKHDX
tKHQV
tKHQX
tKHQX2
tKHQZ
tGLQX
tGLQV
tGHQZ
tZZR
tZZE
3.3
1.3
1.3
0.3
0.3
0.6
0.6
0.65
0.65
0.65
0.1
20.0
1.6
2.0
2.0
2.0
15.0
ns
ns
ns
ns 2
ns 2
ns
ns
ns 1
ns 1, 6
ns 1, 4, 6
ns 1, 3, 6
ns 1, 4, 6
ns 1, 4
ns 1, 3
ns 5
ns 1, 3, 5
2. Parameters may be guaranteed by design, i.e., without tester guardband.
3. Transitions are measured ±50 mV of output high impedance from output low impedance.
4. Transitions are measured ±50 mV from steady state voltage.
5. When ZZ is switching, clock input K must be at the same logic level for the reliable operation.
6. Minimum value is verified by design and tested without guardband.
Rev.1.00 Jun 27, 2005 page 8 of 19

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