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CL-PS7110 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
Manufacturer
CL-PS7110
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CL-PS7110 Datasheet PDF : 82 Pages
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CL-PS7110
Low-Power System-on-a-Chip
1. FUNCTIONAL DESCRIPTION
1.1 Overview
The CL-PS7110 is a single-device embedded controller designed to be used in ultra-low-cost applications
such as a hand-held personal organizers and hand-held internet browsers. There are other devices
offered by Cirrus Logic (http://www.cirrus.com) such as fax/modem chipsets, IR chipsets, codecs, etc.,
that can be used around the CL-PS7110 to build a complete hand-held organizer. The CL-PS7110 oper-
ates at both 3 V and 5 V. However, the AC timings shown in this data book (v1.5) reflect 3-V operation.
Figure 1-1 shows a simplified functional block diagram of the CL-PS7110. All external memory and
peripheral devices are connected to the 32-bit data bus, using the external 28-bit address bus and control
signals. Bus transfer times can be extended using the EXPRDY signal to lengthen bus cycles. The max-
imum burst transfer rate of the external bus is approximately 70 Mbytes/sec.
3.6864 MHz
32.786 kHz
EINT[1–3],
FIQ
BATOK, EXTPWR
PWRFL, BATCHG
PORTS A B C D — 8-BIT
PORT E — 4-BIT
KEYBOARD COLUMN
DRIVES (0–7)
BUZZER DRIVE
DC TO DC
CLK, SYNC, IN,
OUT, SMPCLK
CLK, SYNC IN,
OUT
18.432-MHz
PLL
32.768-kHz
OSCILLATOR
INTERRUPT
CONTROLLER
POWER
MANAGEMENT
GPIO
PSU
CONTROL
SYNCHRONOUS
SERIAL I/O
CODEC
INTERFACE
ARM710A
ARM7
µP CORE
8-KBYTE
CACHE
MMU
COUNTERS
(2)
RTC
INTERNAL DATA BUS
STATE
CONTROL
ROM/EXPANSION
CONTROL
DRAM
CONTROLLER
INTERNAL
ADDRESS BUS
MUX
D0–D31
POR, RUN,
RESET,
WAKEUP
EXPCLK, WORD,
CD[0–7], EXPRDY,
WRITE
MOE, MWE
RAS[0–3], CAS[0–3]
A[0–27],
DRA[0–12]
LCD
CONTROLLER
LCD DRIVE
UART
IRDA
LED AND PHOTO-
DIODE
RS232 INTERFACE
Figure 1-1. Functional Block Diagram
The core-logic functionality is built around an ARM710A microprocessor and 8 Kbytes of cache. At 18.432
MHz (for 3-V operation) and with an on-chip 8-Kbyte cache (four-way set-associative), the CL-PS7110
delivers approximately 15 MIPS of sustained performance (18.4 MIPS peak). This is approximately the
same as a 33-MHz, ’486-based PC.
May 1997
DATA BOOK v1.5
11
FUNCTIONAL DESCRIPTION

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