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VNQ6040STR-E View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
VNQ6040STR-E
ST-Microelectronics
STMicroelectronics ST-Microelectronics
VNQ6040STR-E Datasheet PDF : 73 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Block diagram and pin description
VNQ6040S-E
Pin number
19, 20
27, 28, 29, 30
7, 8, 9, 10
1, 2, 3, 4
33, 34, 35, 36
15
16
17
18
13
14
22
23
24
25
12
Table 1. Pin functionality description
Name
Function
VCC
GND
OUTPUT0
OUTPUT1
Battery connection. This is the backside TAB and is the direct
connection to drain Power MOSFET switches.
Ground connection. This pin serves as the ground connection for the
logic part of the device.
Power OUTPUT 0. It is the direct connection to the source Power
MOSFET switch No. 0.
Power OUTPUT 1. It is the direct connection to the source Power
MOSFET switch No. 1.
OUTPUT2
OUTPUT3
CSN
Power OUTPUT 2. It is the direct connection to the source Power
MOSFET switch No. 2.
Power OUTPUT 3. It is the direct connection to the source Power
MOSFET switch No. 3.
Chip Select Not (Active low). It is the selection pin of the device. It is
a CMOS compatible input.
It is also used as CSN monitoring pin. It must be toggled within a
CSN monitoring Time-out period to keep the device alive.
SCK
SDI
Serial Clock. It is a CMOS compatible input.
Serial Data Input. Transfers data to be written serially into the device
on SCK rising edge.
SDO
PWMCLK
CS_SYNC
IN0
IN1
IN2
Serial Data Output. Transfers data serially out of the device on SCK
falling edge.
PWM external clock. The frequency of the internal PWM signal is
1/512xPWM CLK frequency for channels operating in BULB mode
and 1/256xPWM CLK frequency for channels operating in LED
mode. Device defaults to internally generated fixed PWM
frequencies if PWM CLK frequency decreases below the minimum
specified value.
Current sense synchronization pin. The pin is high when the outputs,
whose currents are reflected on current sense pin, are on.
Direct Input pin for channel 0. Controls the OUTPUT 0 state in Limp
Home mode.
Direct Input pin for channel 1. Controls the OUTPUT 1 state in Limp
Home mode.
Direct Input pin for channel 2. Controls the OUTPUT 2 state in Limp
Home mode.
IN3
Direct Input pin for channel 3. Controls the OUTPUT 3 state in Limp
Home mode.
VDD
External 5V Supply. Powers the SPI interface.
10/73
DocID18061 Rev 11

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