MAX8646 View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX8646

6A, 2MHz Step-Down Regulator with Integrated Switches

Maxim Integrated 

6A, 2MHz Step-Down Regulator

with Integrated Switches

Pin Description

PIN

NAME

FUNCTION

1

PREBIAS Leave Pin Unconnected to Prevent Discharging of Output Capacitor During Soft-Start. Connect to GND

otherwise. See the Soft-Starting into a Prebiased Output section.

2

VDD

Supply Voltage and Bypass Input. Connect VDD to IN with a 10Ω resistor. Connect a 1µF ceramic

capacitor from VDD to GND.

3, 4

CTL1, Preset Output Voltage Selection Input. CTL1 and CTL2 set the output voltage to one of nine preset

CTL2 voltages. See Table 1 for preset voltages.

External Reference Input. Connect REFIN to SS to use the internal 0.6V reference. Connecting REFIN to an

5

REFIN external reference voltage forces FB to regulate the voltage applied to REFIN. REFIN is internally pulled to

GND when the IC is in shutdown mode.

6

SS

Soft-Start Input. Connect a capacitor from SS to GND to set the startup time. See the Soft-Start and REFIN

section for details on setting the soft-start time.

7

GND Analog Circuit Ground

8

COMP

Output of the Voltage-Error Amplifier. Connect the necessary compensation network from COMP to FB.

COMP is internally pulled to GND when the IC is in shutdown mode.

Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set

9

FB the output voltage from 0.6V to 90% of VIN. Connect FB through an RC network to the output when using

CTL1 and CTL2 to select any of nine preset voltages.

10

11

12

13

14, 15, 16

OUT

FREQ

PWRGD

BST

LX

Output Voltage Sense. Connect to the output. Leave OUT unconnected when an external resistor-divider

is used.

Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching frequency.

Power-Good Output. Open-drain output that is high impedance when VFB ≥ 90% of VREFIN or 0.6V. PWRGD is

internally pulled low when VFB falls below 90% of its regulation point. PWRGD is internally pulled low when the

IC is in shutdown mode, VDD or VIN is below the UVLO threshold, or the IC is in thermal shutdown.

High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF capacitor.

Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the output

inductor. LX is high impedance when the IC is in shutdown mode.

17–20

PGND Power Ground. Connect all PGND pins externally to the power ground plane.

21, 22,

23

24

—

IN

Power-Supply Input. Input supply range is from 2.35V to 3.6V. Bypass with 22µF ceramic capacitance to

PGND externally. See the Typical Application Circuit.

EN Enable Input. Logic input to enable/disable the MAX8646.

EP Exposed Pad. Connect to a large ground plane to optimize thermal performance.

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