MT6162N View Datasheet(PDF) - MediaTek Inc
Part Name
Description
Manufacturer
MT6162N Datasheet PDF : 32 Pages
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MT6162
Parameter
GMSK Data Write Operation
Tgmskclk
T1
T2
Tguard
Symbol Min Typ Max
16.28
16.28
8.14
16.28
Unit Test Conditions / Comments
Ns CLK Period (1/61.44 MHz)
Native Data rate in 2G filter is 4.33
MHz, 14 bit words.
ns
Enable High to CLK High
ns
CLK Low to EN Low
ns
Enable Low to Enable High
wire3_en
wire3_clk
wire3_datai[1]
wire3_datai[0]
wire3_dataoe
Tguard
T1 Ts Th
T2
data
bit
read
bit
A7
A6
A5
A4
A3
A2
Konka_WCX A1 D19 D17 D15 D13 D11 D9 D7 D5
A0 D18 D16 D14 D12 D10 D8 D6 D4
D3
D2
D1
D0
data
bit
read
bit
cwx[19:0]
cwx
T1 >= 1/61.44MHz, T2 >= 0.5xT1 , Tguard >=1/61.44MHz
Figure 3: Serial Port Write Operation
Figure 4: Serial Port Read Operation
Tguard
wire3_en
wire3_clk
wire3_data[1]
wire3_data[0]
Konka_WCX T1
T2
data
bit
D13 D11
D9
D7
D5
D3
D1
read
bit
D12
D10
D8
D6
D4
D2
D0
T1 >= 1/61.44MHz, T2 >= 0.5xT1 , Tguard >=1/61.44MHz
data
bit
D13
D11
read
bit
D12
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Figure 5. Tx Data Operation
REV. (1.5) Mar 20th 2011
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