NTE1720 View Datasheet(PDF) - NTE Electronics
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NTE1720 Datasheet PDF : 4 Pages
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APPLICATIONS INFORMATION: (Functional Description and Pin Functions)
Voltage Regulator
The Internal 5V regulator (Input Pin15, output Pin16) supplies a regulated 5V to all Internal circuitry,
as well as up to 50mA for external circuitry. For operation below 8V externally applied.
Oscillator
The Internal oscillator circuitry sets the frequency of operation for the switching regulator. The oscilla-
tor waveform is a ramp from about 1V to 3.5V (Pin7). Frequency is set by a timing resistor from Pin6
to ground and a capacitor from Pin7 to GND. The oscillator period is approximately RC for the recom-
mended range of 1.8K to 100K for R and 0.001µF to 0.1µF for C.
The fall time of the ramp sets the blanking or dead time where both outputs are off in push–pull regula-
tors. This is controlled by the value of the capacitor alone.
Output Transistors
The two output transistors have both the emitters (Pin11 and Pin14) and the collectors available
(Pin12 and Pin13). Internal current limiting for both of these transistors is about 100mA. The two
transistors are driven 180° out of phase by the flip–flop. For single–ended operation they should be
connected in parallel.
Error Amplifier
The differential Input (Pin1 and Pin2) single–ended output (Pin9) transconductance amplifier pro-
vides about 80dB of gain, as well as providing a point for loop frequency compensation or electronic
shutdown.
DC gain of the loop can be controlled by resistive loading, while AC compensation is usually accom-
plished with a series R–C conncected from Pin9 to GND. The output impedance at Pin9 is about 5MΩ
and current is about 200µA, so external op–amps or voltage sources can easily drive the comparator
input. Normally, the 5V reference is divided down to generate a voltage within the common mode
range of the error ampliifier.
Synchronous Operation
When an external clock is desired, a clock pulse of approximately 3V can be applied directly to the
oscillator output, Pin3. The impedance to GND at this point is approximately 2kΩ. In this configura-
tion, RT CT must be selected for a clock period slightly greater than that of the external clock.
If two or more NTE1720 regulators are to be operated synchronously, all oscillator output terminals
should be tied together. The oscillator programmed for the minimum clock period will be the master
from which all the other operate. In this application, the CT RT value of the slaved regulators must
be set for a period approximately 10% longer than that of the master regulator. In addition, CT (master)
= 2 CT (slave) to ensure that the master output pulse, which occurs first, has a wider pulse width and
will subsequently reset the slave regulators.
Shutdown
A logic high at Pin10 will shut down the regulator and cause both output transistors to turn off.
Current Limit
Current limiting is activated when the voltage between Pin4 and Pin5 exceeds 200mV. The output
of the current limit amplifier Internally sums with error amplifier to shorten the output pulse width. The
gain of the current limit circuitry is relatively low, so current control in limit is typically about 5%. Two
areas of caution should be observed with current limiting. First, the reponse time of the current limit
is set by the loop roll–off on Pin9. Fast current limiting requires external circuitry. Second, the com-
mon–mode range of the current limit amplifier is limited. Even fast spikes outside this range can dis-
rupt operation.
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