82545GM View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

82545GM

Gigabit Ethernet Controller

Intel 

82545GM — Networking Silicon

I/O pins with dual-mode function for XOR test:

Pin Name

FLSH_CE_N

Dual-Mode Name

XOR_OUT

Pin Function

Output of XOR tree.

When XOR tree test is selected, the following pin behavior(s) occur:

• Output drivers for the pins listed as tested are all placed in high-impedance (tri-state) state to

ensure that the board/system test fixture can drive the tested inputs without contention

• The output driver for the XOR tree output on pin FLSH_CE_N is explicitly enabled.

4.1.2

Pins Tested

When performing XOR test, those pins tested by the XOR tree all function as inputs, regardless of

the normal directionality of the pin. The following table(s) cites the pins tested and not-testable as

inputs to the XOR tree. Table entries do not reflect the natural order of input into the XOR tree

itself (nor need to, as the output of a multi-input XOR function is order-independent).

Pins included in XOR test tree are listed in Table 1:

Table 1. Tested Pins Included in XOR Tree

Pin Name

PCI_AD[63:0]

PCI_CBE_N[7:0]

PCI_PAR

PCI_PAR64

PCI_FRAME_N

PCI_IRDY_N

PCI_TRDY_N

PCI_STOP_N

PCI_IDSEL

PCI_DEVSEL_N

PCI_REQ64_N

PCI_ACK64_N

PCI_REQ_N

PCI_GNT_N

PCI_LOCK_N

PCI_INTA_N

PCI_INTB_N

PCI_CLK

Pin Name

M66EN

PCI_RST_N

LAN_PWR_GOOD

PCI_SERR_N

PCI_PERR_N

PCI_PME_N

AUX_PWR

SMBCLK

SMBDAT

TX_DATA[9]/TX_ER

TX_DATA[8]/TX_EN

TX_DATA[7:0]

GTX_CLK

COL

CRS

LINK/LOS

RX_DATA[9]/RX_ER

RX_DATA[8]/RX_DV

Pin Name

RX_DATA[7:0]

RBC0/RX_CLK

RBC1/MTX_CLK

EE_DI

EE_DO

EE_CS

EE_SK

FLSH_ADDR[18:0]

FLSH_OE_N

FLSH_WE_N

FLSH_DATA[7:0]

LED_A[3:0]

LED_B[3:0]

SDP_A[7,6,1,0]

SDP_B[6,1,0]

ALTCLK_125

20

Datasheet

Share Link: