CY8C21345-24SXIT(2010) View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY8C21345-24SXIT Datasheet PDF : 35 Pages
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CY8C21345
CY8C22345, CY8C22545
Analog System
The Analog System consists of a 10-bit SAR ADC and six
configurable blocks.
The programmable 10-bit SAR ADC is an optimized ADC that
can be run up to 200 ksps with ± 1.5 LSB DNL and ± 2.5 LSB INL
(true for VDD ≥ 3.0V and Vref ≥ 3.0V). External filters are required
on ADC input channels for antialiasing. This ensures that any
out-of-band content is not folded into the input signal band.
Reconfigurable analog resources allow creating complex analog
signal flows. Analog peripherals are very flexible and may be
customized to support specific application requirements. Some
of the more common PSoC analog functions (most available as
user modules) are:
■ Analog-to-Digital converters (Single or Dual, with 8-bit
resolution)
■ Pin-to-pin Comparator
■ Single ended comparators with absolute (1.3V) reference or
5-bit DAC reference
■ 1.3V reference (as a System Resource)
Analog blocks are provided in columns of four, which include
CT-E (Continuous Time) and SC-E (Switched Capacitor) blocks.
These devices provide limited functionality Type “E” analog
blocks.
Figure 2. Analog System Block Diagram
Array Input Configuration
Additional System Resources
System Resources, some of which are listed in the previous
sections, provide additional capability useful to complete
systems. Additional resources include a MAC, low voltage
detection, and power on reset. The merits of each system
resource are:
■ Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks may be routed
to both the digital and analog systems. Additional clocks can
be generated using digital PSoC blocks as clock dividers.
■ Additional Digital resources and clocks optimized for CSD.
■ Support “RTC” block into digital peripheral logic.
■ A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate, to assist in both general math and
digital filters.
■ The I2C module provides 100 and 400 kHz communication over
two wires. Slave, master, and multi-master modes are all
supported.
■ Low Voltage Detection (LVD) interrupts can signal the
application of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
■ An internal 1.3V reference provides an absolute reference for
the analog system, including ADCs and DACs.
ACI0[1:0]
ACI1[1:0]
ACI1[1:0]
ACI1[1:0]
ACE00
ASE10
ACE01
ASE11
ACE10
ACE11
Block Array
AmuxL
ACI2[3:0]
AmuxR
P0[0:7]
10 bit SAR ADC
Interface to
Digital System
AGND
Analog Reference
Reference
Generators
Bandgap
M8C Interface (Address Bus, Data Bus, Etc.)
Document Number: 001-43084 Rev. *L
Page 4 of 35
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