CY8C21345-24SXIT View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY8C21345-24SXIT Datasheet PDF : 39 Pages
| |||
CY8C21345
CY8C22345
CY8C22545
CY8C22545 44-pin TQFP
Table 3. Pin Definitions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Type
Digital
Analog
I/O
ML
I/O
ML
I/O
ML
Power
I/O
ML
I/O
ML
I/O
ML
Power
I/O
ML
I/O
ML
I/O
ML
I/O
ML
I/O
ML
I/O
ML
I/O
ML
I/O
ML
Power
I/O
MR
19
I/O
MR
Pin Name
Description
Figure 4. Pin Diagram
P2[5]
P2[3]
P2[1]
Vdd
P4[5]
P4[3]
P4[1]
Vss
P3[7]
P3[5]
P3[3]
P3[1]
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
Optional ADC External Vref
Supply Voltage
Ground Connection
I2C serial clock (SCL)
I2C serial data (SDA)
ADC_Ext_Vref, ML, P2[5] 1
ML, P2[3] 2
ML, P2[1] 3
Vdd 4
ML, P4[5] 5
ML, P4[3] 6
ML, P4[1] 7
Vss 8
ML, P3[7] 9
ML, P3[5] 10
ML, P3[3] 11
Crystal (XTALin), I2C SCL, TC SCLK[4]
Ground Connection
CSDryAsTtaAl[(4X] TALout), I2C SDA, TC
TQFP
33 P2[4], MR
32 P2[2], MR
31 P2[0], MR
30 Vss
29 P4[4], MR
28 P4[2], MR
27 P4[0], MR
26 XRES
25 P3[6], MR
24 P3[4], MR
23 P3[2], MR
20
I/O
MR
P1[4]
Optional external clock input (EXTCLK)
21
I/O
MR
P1[6]
22
I/O
MR
P3[0]
23
I/O
MR
P3[2]
24
I/O
MR
P3[4]
25
I/O
MR
P3[6]
26
Input
XRES
Active High Pin Reset with Internal Pull
Down
27
I/O
MR
P4[0]
28
I/O
MR
P4[2]
29
I/O
MR
P4[4]
30
Power
Vss
Ground Connection
31
I/O
MR
P2[0]
32
I/O
MR
P2[2]
33
I/O
MR
P2[4]
34
I/O
I, MR
P2[6]
To Compare Column 1
35
I/O
I, MR
P0[0]
36
I/O
I, MR
P0[2]
37
I/O
I, MR
P0[4]
38
I/O
I, MR
P0[6]
39
Power
Vdd
Supply Voltage
40
I/O
I, MR
P0[7]
Integration Capacitor for MR
41
I/O
I, ML
P0[5]
Integration Capacitor for ML
42
I/O
I, ML
P0[3]
43
I/O
I, ML
P0[1]
44
I/O
I, ML
P2[7]
To Compare Column 0
LEGEND: A = Analog, I = Input, O = Output, M=Analog Mux input, MR= Analog Mux right input, ML= Analog Mux left input.
Document Number: 001-43084 Rev. *Q
Page 9 of 39
Share Link: 