MT8MTF51264HRZ-1G4 View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT8MTF51264HRZ-1G4

1.35V DDR3L-RS SDRAM SODIMM

Micron Technology 

4GB (x64, SR) 204-Pin DDR3L-RS SODIMM

Electrical Specifications

Electrical Specifications

Stresses greater than those listed may cause permanent damage to the module. This is a

stress rating only, and functional operation of the module at these or any other condi-

tions outside those indicated in each device's data sheet is not implied. Exposure to ab-

solute maximum rating conditions for extended periods may adversely affect reliability.

Table 9: Absolute Maximum Ratings

Symbol

VDD

VIN, VOUT

Parameter

VDD supply voltage relative to VSS

Voltage on any pin relative to VSS

Min

–0.4

–0.4

Max

1.975

1.975

Units

V

V

Table 10: Operating Conditions

Symbol Parameter

VDD VDD supply voltage

VREFCA(DC) Input reference voltage command/ address bus

VREFDQ(DC) I/O reference voltage DQ bus

IVTT Termination reference current from VTT

VTT Termination reference voltage (DC) – command/

address bus

II

Input leakage current;

Address in-

Any input 0V ≤ VIN ≤ VDD; VREF

puts, RAS#,

input 0V ≤ VIN ≤ 0.95V (All other CAS#, WE#, S#,

pins not under test = 0V)

CKE, ODT, BA,

CK, CK#

DM

IOZ Output leakage current;

DQ, DQS,

0V ≤ VOUT ≤ VDD; DQ and ODT are DQS#

disabled; ODT is HIGH

IVREF

TA

TC

VREF supply leakage current; VREFDQ = VDD/2 or

VREFCA = VDD/2 (All other pins not under test = 0V)

Module ambient operating temperature

DDR3 SDRAM component case operating tempera-

ture

Min

1.283

1.425

0.49 × VDD

0.49 × VDD

–600

0.49 × VDD -

20mV

–16

–2

–5

–8

0

0

Nom

1.35

1.5

0.5 × VDD

0.5 × VDD

–

0.5 × VDD

0

0

0

0

–

–

Max

1.45

1.575

0.51 × VDD

0.51 × VDD

600

0.51 × VDD +

20mV

16

Units

V

V

V

V

mA

V

Notes

1

2

µA

2

5

µA

8

µA

70

°C

3, 4

95

°C 3, 4 , 5

Notes:

1. Module is backward-compatible with 1.5V operation. Refer to device specification for

details and operation guidance.

2. VTT termination voltage in excess of the stated limit will adversely affect the command

and address signals’ voltage margin and will reduce timing margins.

3. TA and TC are simultaneous requirements.

4. For further information, refer to technical note TN-00-08: “Thermal Applications,”

available on Micron’s Web site.

5. The refresh rate is required to double when 85°C < TC ≤ 95°C.

PDF: 09005aef84fc0fd3

mtf8c512x64hz_g0_h0.pdf - Rev. D 5/13 EN

11

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2012 Micron Technology, Inc. All rights reserved.

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