KIT33926PNBEVBE(2014) View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
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KIT33926PNBEVBE Datasheet PDF : 27 Pages
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PIN CONNECTIONS
Table 2. 33926 Pin Definitions (continued)
Pin
Pin Name
Pin
Function
Formal Name
Definition
12, 13,
14, 15
16
18 – 20,
22 – 24
21
26
27, 28,
29, 30
32
OUT1
D2
PGND
SF
D1
OUT2
CCP
Power
Output
Logic Input
H-Bridge Output 1
Disable Input 2
(Active Low)
Power
Ground
Power Ground
Logic
Output -
Open Drain
Status Flag
(Active Low)
Logic Input
Disable Input 1
(Active High)
Power
Output
H-Bridge Output 2
Analog
Output
Charge Pump
Capacitor
Source of high-side MOSFET1 and drain of low-side MOSFET1.
When D2 is logic LOW, both OUT1 and OUT2 are tri-stated. (Schmitt trigger
input with ~80 A sink so default condition = disabled.)
High-current power ground pins must be connected together physically as
close as possible and directly soldered down to a wide, thick, low resistance
ground plane on the PCB.
Open drain active LOW status flag output (requires an external pull-up resistor
to VDD. Maximum permissible load current < 0.5 mA. Maximum VCESAT
< 0.4 V at 0.3 mA. Maximum permissible pull-up voltage < 7.0 V.)
When D1 is logic HIGH, both OUT1 and OUT2 are tri-stated. Schmitt trigger
input with ~80 A source so default condition = disabled.
Source of high-side MOSFET2 and drain of low-side MOSFET2.
External reservoir capacitor connection for internal charge pump; connected to
VPWR. Allowable values are 30 to 100 F. Note: This capacitor is required for
the proper performance of the device.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33926
5
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