EMC1402-1-ACZL-TR View Datasheet(PDF) - SMSC -> Microchip
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Description
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EMC1402-1-ACZL-TR Datasheet PDF : 40 Pages
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1°C Temperature Sensor with Beta Compensation
Datasheet
Chapter 4 System Management Bus Interface Protocol
4.1
.
System Management Bus Interface Protocol
TheEMC1402 communicates with a host controller, such as an SMSC SIO, through the SMBus. The
SMBus is a two-wire serial communication protocol between a computer host and its peripheral
devices. A detailed timing diagram is shown in Figure 4.1.
For the first 15ms after power-up the device may not respond to SMBus communications.
SMCLK
TLOW
THIGH
TRISE
TFALL
THD:STA
TSU:STO
THD:STA
THD:DAT
TSU:DAT
TSU:STA
SMDTA
TBUF
P S S - Start Condition
S
P - Stop Condition P
Figure 4.1 SMBus Timing Diagram
The EMC1402 is SMBus 2.0 compatible and support Send Byte, Read Byte, Write Byte, Receive Byte,
and the Alert Response Address as valid protocols as shown below.
All of the below protocols use the convention in Table 4.1.
4.2
Table 4.1 Protocol Format
DATA SENT
TO DEVICE
# of bits sent
DATA SENT TO
THE HOST
# of bits sent
Attempting to communicate with the EMC1402 SMBus interface with an invalid slave address or invalid
protocol will result in no response from the device and will not affect its register contents. Stretching
of the SMCLK signal is supported, provided other devices on the SMBus control the timing.
Write Byte
The Write Byte is used to write one byte of data to the registers as shown below Table 4.2:
SLAVE
START ADDRESS
WR
1 -> 0
1001_100
0
Revision 2.0 (08-10-12)
Table 4.2 Write Byte Protocol
ACK
0
REGISTER
ADDRESS
XXh
ACK
0
12
DATASHEET
REGISTER
DATA
XXh
ACK
0
STOP
0 -> 1
SMSC EMC1402
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