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ST7FLITE35 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ST7FLITE35 Datasheet PDF : 173 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ST7LITE3xF2
Pin Name
Level
Port / Control
Input
Main
Output Function
(after
reset)
Alternate Function
PA6 /MCO/
10 12 ICCCLK/
BREAK
I/O CT
X
ei1
11
13
PA5 /ATPWM3/
ICCDATA
I/O
CT
HS
X
12 14 PA4/ATPWM2 I/O CT HS X
13 15 PA3/ATPWM1 I/O CT HS X
14 16 PA2/ATPWM0 I/O CT HS X ei0
15 17 PA1/ATIC
I/O CT HS X
16 18 PA0/LTIC
I/O CT HS X X
17 19 OSC2
O
18 20 OSC1/CLKIN I
Main Clock Output or In Circuit Com-
munication Clock or External BREAK
Caution: During normal operation this
pin must be pulled- up, internally or ex-
X X Port A6 ternally (external pull-up of 10k manda-
tory in noisy environment). This is to
avoid entering ICC mode unexpectedly
during a reset. In the application, even
if the pin is configured as output, any re-
set will put it back in input pull-up.
X
X
Port A5
Auto-Reload Timer PWM3 or In Circuit
Communication Data
X X Port A4 Auto-Reload Timer PWM2
X X Port A3 Auto-Reload Timer PWM1
X X Port A2 Auto-Reload Timer PWM0
X X Port A1 Auto-Reload Timer Input Capture
X X Port A0 Lite Timer Input Capture
Resonator oscillator inverter output
Resonator oscillator inverter input or External
clock input
Notes:
1. It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA
pins to ground.
2. For input with interrupt possibility “eix” defines the associated external interrupt vector which can be as-
signed to one of the I/O pins using the EISR register. Each interrupt can be either weak pull-up or floating
defined through option register OR.
8/173
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