AT89C5131A-TISIL(2004) View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT89C5131A-TISIL Datasheet PDF : 34 Pages
| |||
Clock Waveforms
Valid in normal clock mode. In X2 mode XTAL2 must be changed to XTAL2/2.
INTERNAL
CLOCK
XTAL2
STATE4 STATE5 STATE6 STATE1 STATE2 STATE3 STATE4 STATE5
P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2
ALE
EXTERNAL PROGRAM MEMORY FETCH
PSEN
THESE SIGNALS ARE NOT ACTIVATED DURING THE
EXECUTION OF A MOVX INSTRUCTION
P0
P2 (EXT)
DATA
SAMPLED
FLOAT
PCL OUT
DATA
SAMPLED
FLOAT
PCL OUT
INDICATES ADDRESS TRANSITIONS
DATA
SAMPLED
FLOAT
PCL OUT
READ CYCLE
RD
P0
P2
DPL OR Rt OUT
DATA
SAMPLED
FLOAT
INDICATES DPH OR P2 SFR TO PCH TRANSITION
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
WRITE CYCLE
WR
P0
P2
DPL OR Rt OUT
PCL OUT (EVEN IF PROGRAM
MEMORY IS INTERNAL)
DATA OUT
INDICATES DPH OR P2 SFR TO PCH TRANSITION
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
PORT OPERATION
MOV PORT SRC
OLD DATA NEW DATA
MOV DEST P0
P0 PINS SAMPLED
MOV DEST PORT (P1. P2. P3) P1, P2, P3 PINS SAMPLED
(INCLUDES INTO. INT1. TO T1)
SERIAL PORT SHIFT CLOCK
TXD (MODE 0)
RXD SAMPLED
P0 PINS SAMPLED
P1, P2, P3 PINS SAMPLED
RXD SAMPLED
This diagram indicates when signals are clocked internally. The time it takes the signals to propagate to the pins, however,
ranges from 25 to 125 ns. This propagation delay is dependent on variables such as temperature and pin loading. Propaga-
tion also varies from output to output and component. Typically though (TA = 25°C fully loaded) RD and WR propagation
delays are approximately 50 ns. The other signals are typically 85 ns. Propagation delays are incorporated in the AC
specifications.
26 AT89C5131A-L
4338A–USB–08/04
Share Link: 