AD5341 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD5341 Datasheet PDF : 28 Pages
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AD5330/AD5331/AD5340/AD5341
DB10 1
DB11 2
BUF 3
GAIN 10
DB.. 9 24
DB0 15
CS 8
WR 9
CLR 11
LDAC 12
POWER-ON
RESET
VREF
4
VDD
14
AD5340
INPUT
REGISTER
DAC
REGISTER
12-BIT
DAC
BUFFER
5 VOUT
RESET
POWER-DOWN
LOGIC
Figure 7. AD5340 Functional Block Diagram
13
7
PD GND
DB10 1
DB11 2
BUF 3
VREF 4
VOUT 5
NC 6
GND 7
CS 8
WR 9
GAIN 10
CLR 11
LDAC 12
12-BIT
AD5340
TOP VIEW
(Not to Scale)
24 DB9
23 DB8
22 DB7
21 DB6
20 DB5
19 DB4
18 DB3
17 DB2
16 DB1
15 DB0
14 VDD
13 PD
Figure 8. AD5340 Pin Configuration
Table 7. AD5340 Pin Function Descriptions
Pin No.
1
2
3
Mnemonic
DB10
DB11
BUF
Description
Parallel Data Input.
Most Significant Bit of Parallel Data Input.
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
4
VREF
Reference Input.
5
VOUT
Output of DAC. Buffered output with rail-to-rail operation.
6
NC
No Connect.
7
GND
Ground reference point for all circuitry on the part.
8
CS
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
9
WR
10
GAIN
11
CLR
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
Gain Control Pin. This controls whether the output range from the DAC is 0 V to VREF or 0 V to 2 × VREF.
Asynchronous active low control input that clears all input registers and DAC registers to zero.
12
LDAC
13
PD
14
VDD
15 to 24 DB0 to DB9
Active low control input that updates the DAC registers with the contents of the input registers.
Power-Down Pin. This active low control pin puts the DAC into power-down mode.
Power Supply Input. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 μF capacitor in parallel with a 0.1 μF capacitor to GND.
Ten Parallel Data Inputs.
Rev. A | Page 9 of 28
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