SST25VF032B-80-4I-QAF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

SST25VF032B-80-4I-QAF

32 Mbit SPI Serial Flash

Microchip Technology 

A Microchip Technology Company

Pin Description

32 Mbit SPI Serial Flash

SST25VF032B

Data Sheet

CE#

SO

WP#

VSS

1

8

2

7

Top View

3

6

VDD

HOLD#

SCK

4

5

SI

1327 8-SOIC P1.0

CE# 1

SO 2

WP# 3

VSS 4

Top View

8 VDD

7 HOLD#

6 SCK

5 SI

1327 8-WSON P1.0

Note: In AAI mode, the SO pin can act as a RY/BY# pin when configured as a ready/busy status pin. See “End-of-

Write Detection” on page 12. for details.

Figure 2: Pin Assignments for 8-Lead SOIC

Table 1: Pin Description

Symbol

SCK

SI

SO

RY/BY#

CE#

WP#

HOLD#

VDD

VSS

Pin Name

Functions

Serial Clock

To provide the timing of the serial interface.

Commands, addresses, or input data are latched on the rising edge of the clock

input, while output data is shifted out on the falling edge of the clock input.

Serial Data Input To transfer commands, addresses, or data serially into the device.

Inputs are latched on the rising edge of the serial clock.

Serial Data Output To transfer data serially out of the device.

Data is shifted out on the falling edge of the serial clock.

Ready / Busy pin Flash busy status pin in AAI mode if SO is configured as a hardware RY/BY#

pin.

Chip Enable

The device is enabled by a high to low transition on CE#. CE# must remain low

for the duration of any command sequence.

Write Protect

The Write Protect (WP#) pin is used to enable/disable BPL bit in the status reg-

ister.

Hold

To temporarily stop serial communication with SPI flash memory without reset-

ting the device.

Power Supply

To provide power supply voltage: 2.7-3.6V

Ground

T1.0 25071

©2011 Silicon Storage Technology, Inc.

4

DS25071A

12/11

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