ATMEGA64RZAV-10PU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATMEGA64RZAV-10PU

8-bit Atmel Microcontroller with 64K Bytes In-System Programmable Flash

Atmel Corporation 

ATmega644

2.2.4

2.2.5

2.2.6

2.2.7

2.2.8

2.2.9

and source capability. As inputs, Port A pins that are externally pulled low will source current if

the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes

active, even if the clock is not running.

Port A also serves the functions of various special features of the ATmega644 as listed on page

73.

Port B (PB7:PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B also serves the functions of various special features of the ATmega644 as listed on page

75.

Port C (PC7:PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port C output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port C also serves the functions of the JTAG interface, along with special features of the

ATmega644 as listed on page 78.

Port D (PD7:PD0)

RESET

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port D also serves the functions of various special features of the ATmega644 as listed on page

80.

XTAL1

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running. The minimum pulse length is given in ”System and Reset

Characteristics” on page 320. Shorter pulses are not guaranteed to generate a reset.

XTAL2

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

Output from the inverting Oscillator amplifier.

5

2593O–AVR–02/12

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