CY7C64215-28PVXC(2005) View Datasheet(PDF) - Cypress Semiconductor
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Description
Manufacturer
CY7C64215-28PVXC Datasheet PDF : 26 Pages
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CY7C64215
enCoRe™ III Full Speed USB Controller
1.0 Features
• Powerful Harvard Architecture Processor
— M8C Processor Speeds to 24 MHz
— Two 8x8 Multiply, 32-bit Accumulate
— 3.0 to 5.25V Operating Voltage
— USB Temperature Range: 0°C to +70°C
• Advanced Peripherals (enCoRe™ III Blocks)
— Analog enCoRe III Block Provides:
• Up to 14-bit ADCs
— 4 Digital enCoRe III Blocks Provide:
• 8-bit PWMs
• Full-Duplex UART
• Multiple SPI Masters or Slaves
• Connectable to all GPIO Pins
• Complex Peripherals by Combining Blocks
• Full-Speed USB (12 Mbps)
— Four Unidirectional Endpoints
— One Bidirectional Control Endpoint
— USB 2.0 Compliant
— Dedicated 256 Byte Buffer
— No External Crystal Required
• Flexible On-Chip Memory
— 16K Flash Program Storage 50,000 Erase/Write Cycles
— 1K SRAM Data Storage
— In-System Serial Programming (ISSP)
— Partial Flash Updates
— Flexible Protection Modes
— EEPROM Emulation in Flash
• Programmable Pin Configurations
— 25-mA Sink on all GPIO
— Pull-up, Pull-down, High- Z, Strong, or Open Drain Drive
Modes on all GPIO
— Configurable Interrupt on all GPIO
• Precision, Programmable Clocking
— Internal ±4% 24-/48-MHz Oscillator
— Internal Oscillator for Watchdog and Sleep
— 0.25% Accuracy for USB with no External Components
• Additional System Resources
— I2C Slave, Master, and Multi-Master to 400 kHz
— Watchdog and Sleep Timers
— User-Configurable Low Voltage Detection
— Integrated Supervisory Circuit
— On-Chip Precision Voltage Reference
• Complete Development Tools
— Free Development Software (PSoC™ Designer)
— Full-Featured, In-Circuit Emulator and Programmer
— Full Speed Emulation
— Complex Breakpoint Structure
— 128K Bytes Trace Memory
enCoRe III Core
Figure 1-1. enCoRe III Block Diagram
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document 38-08036 Rev. *A
Revised September 26, 2005
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