CY7C64215-28PVXC(2005) View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

CY7C64215-28PVXC
(Rev.:2005)

enCoRe™ III Full Speed USB Controller

Cypress Semiconductor 

CY7C64215

10.3 Register Map Bank 0 Table: User Space

Name Addr (0,Hex) Access

Name Addr (0,Hex)

PRT0DR 00

RW

PMA0_DR 40

PRT0IE

01

RW

PMA1_DR 41

PRT0GS 02

RW

PMA2_DR 42

PRT0DM2 03

RW

PMA3_DR 43

PRT1DR 04

RW

PMA4_DR 44

PRT1IE

05

RW

PMA5_DR 45

PRT1GS 06

RW

PMA6_DR 46

PRT1DM2 07

RW

PMA7_DR 47

PRT2DR 08

RW

USB_SOF0 48

PRT2IE

09

RW

USB_SOF1 49

PRT2GS 0A

RW

USB_CR0 4A

PRT2DM2 0B

RW

USBIO_CR0 4B

PRT3DR 0C

RW

USBIO_CR1 4C

PRT3IE

0D

RW

4D

PRT3GS 0E

RW

EP1_CNT1 4E

PRT3DM2 0F

RW

EP1_CNT 4F

PRT4DR 10

RW

EP2_CNT1 50

PRT4IE

11

RW

EP2_CNT 51

PRT4GS 12

RW

EP3_CNT1 52

PRT4DM2 13

RW

EP3_CNT 53

PRT5DR 14

RW

EP4_CNT1 54

PRT5IE

15

RW

EP4_CNT 55

PRT5GS 16

RW

EP0_CR

56

PRT5DM2 17

RW

EP0_CNT 57

18

EP0_DR0 58

19

EP0_DR1 59

1A

EP0_DR2 5A

1B

EP0_DR3 5B

PRT7DR 1C

RW

EP0_DR4 5C

PRT7IE

1D

RW

EP0_DR5 5D

PRT7GS 1E

RW

EP0_DR6 5E

PRT7DM2 1F

RW

EP0_DR7 5F

DBB00DR0 20

#

AMX_IN

60

DBB00DR1 21

W

AMUXCFG 61

DBB00DR2 22

RW

62

DBB00CR0 23

#

ARF_CR

63

DBB01DR0 24

#

CMP_CR0 64

DBB01DR1 25

W

ASY_CR

65

DBB01DR2 26

RW

CMP_CR1 66

DBB01CR0 27

#

67

DCB02DR0 28

#

68

DCB02DR1 29

W

69

DCB02DR2 2A

RW

6A

DCB02CR0 2B

#

6B

DCB03DR0 2C

#

TMP_DR0 6C

DCB03DR1 2D

W

TMP_DR1 6D

DCB03DR2 2E

RW

TMP_DR2 6E

DCB03CR0 2F

#

TMP_DR3 6F

30

ACB00CR3 70

31

ACB00CR0 71

32

ACB00CR1 72

33

ACB00CR2 73

34

ACB01CR3 74

35

ACB01CR0 75

36

ACB01CR1 76

37

ACB01CR2 77

38

78

39

79

3A

7A

3B

7B

3C

7C

3D

7D

3E

7E

3F

7F

Blank fields are Reserved and should not be accessed.

Access

RW

RW

RW

RW

RW

RW

RW

RW

R

R

RW

#

RW

#

RW

#

RW

#

RW

#

RW

#

#

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

#

#

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

Name Addr (0,Hex)

ASC10CR0 80

ASC10CR1 81

ASC10CR2 82

ASC10CR3 83

ASD11CR0 84

ASD11CR1 85

ASD11CR2 86

ASD11CR3 87

88

89

8A

8B

8C

8D

8E

8F

ASD20CR0 90

ASD20CR1 91

ASD20CR2 92

ASD20CR3 93

ASC21CR0 94

ASC21CR1 95

ASC21CR2 96

ASC21CR3 97

98

99

9A

9B

9C

9D

9E

9F

A0

A1

A2

A3

A4

A5

A6

A7

MUL1_X

A8

MUL1_Y

A9

MUL1_DH AA

MUL1_DL AB

ACC1_DR1 AC

ACC1_DR0 AD

ACC1_DR3 AE

ACC1_DR2 AF

RDI0RI

B0

RDI0SYN B1

RDI0IS

B2

RDI0LT0

B3

RDI0LT1

B4

RDI0RO0 B5

RDI0RO1 B6

B7

B8

B9

BA

BB

BC

BD

BE

BF

# Access is bit specific.

Access

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

W

W

R

R

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

Name

CUR_PP

STK_PP

IDX_PP

MVR_PP

MVW_PP

I2C_CFG

I2C_SCR

I2C_DR

I2C_MSCR

INT_CLR0

INT_CLR1

INT_CLR2

INT_CLR3

INT_MSK3

INT_MSK2

INT_MSK0

INT_MSK1

INT_VC

RES_WDT

DEC_DH

DEC_DL

DEC_CR0

DEC_CR1

MUL0_X

MUL0_Y

MUL0_DH

MUL0_DL

ACC0_DR1

ACC0_DR0

ACC0_DR3

ACC0_DR2

CPU_F

DAC_D

CPU_SCR1

CPU_SCR0

Addr (0,Hex)

C0

C1

C2

C3

C4

C5

C6

C7

C8

C9

CA

CB

CC

CD

CE

CF

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

DA

DB

DC

DD

DE

DF

E0

E1

E2

E3

E4

E5

E6

E7

E8

E9

EA

EB

EC

ED

EE

EF

F0

F1

F2

F3

F4

F5

F6

F7

F8

F9

FA

FB

FC

FD

FE

FF

Access

RW

RW

RW

RW

RW

RW

#

RW

#

RW

RW

RW

RW

RW

RW

RW

RW

RC

W

RC

RC

RW

RW

W

W

R

R

RW

RW

RW

RW

RL

RW

#

#

Document 38-08036 Rev. *A

Page 9 of 26

Share Link: