H5TQ2G43CFR-XXC View Datasheet(PDF) - Hynix Semiconductor

Part Name

Description

Manufacturer

H5TQ2G43CFR-XXC

2Gb DDR3 SDRAM

Hynix Semiconductor 

Table 7 - IDD4R and IDDQ4R Measurement-Loop Patterna)

Datab)

00

1

2,3

4

5

6,7

1 8-15

2 16-23

3 24-31

4 32-39

5 40-47

6 48-55

7 56-63

RD 0 1 0 1 0 0 00 0 0 0 0 00000000

D 1 0 0 0 0 0 00 0 0 0 0

-

D,D 1 1 1 1 0 0 00 0 0 0 0

-

RD 0 1 0 1 0 0 00 0 0 F 0 00110011

D 1 0 0 0 0 0 00 0 0 F 0

-

D,D 1 1 1 1 0 0 00 0 0 F 0

-

repeat Sub-Loop 0, but BA[2:0] = 1

repeat Sub-Loop 0, but BA[2:0] = 2

repeat Sub-Loop 0, but BA[2:0] = 3

repeat Sub-Loop 0, but BA[2:0] = 4

repeat Sub-Loop 0, but BA[2:0] = 5

repeat Sub-Loop 0, but BA[2:0] = 6

repeat Sub-Loop 0, but BA[2:0] = 7

a) DM must be driven LOW all the time. DQS, DQS are used according to RD Commands, otherwise MID-LEVEL.

b) Burst Sequence driven on each DQ signal by Read Command. Outside burst operation, DQ signals are MID-LEVEL.

Rev. 1.0 / Apr. 2013

21

Share Link: