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74AHCT08BQ-Q100 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
74AHCT08BQ-Q100
NXP
NXP Semiconductors. NXP
74AHCT08BQ-Q100 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Nexperia
74AHC08-Q100; 74AHCT08-Q100
Quad 2-input AND gate
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1A, 2A, 3A, 4A
1, 4, 9, 12
1B, 2B, 3B, 4B
2, 5, 10, 13
1Y, 2Y, 3Y, 4Y
3, 6, 8, 11
GND
7
VCC
14
Description
data input
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3. Function selection[1]
Input
nA
nB
L
X
X
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
Output
nY
L
L
H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
VI
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
SO14 package
VI < 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to (VCC + 0.5 V)
Tamb = 40 C to +125 C
0.5
0.5
[1] 20
[1] -
-
-
75
65
+7.0 V
+7.0 V
-
mA
20 mA
25 mA
75
mA
-
mA
+150 C
[2] -
500 mW
TSSOP14 package
[3] -
500 mW
DHVQFN14 package
[4] -
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 C.
[3] Ptot derates linearly with 5.5 mW/K above 60 C.
[4] Ptot derates linearly with 4.5 mW/K above 60 C.
74AHC_AHCT08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 April 2013
© Nexperia B.V. 2017. All rights reserved
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