FDG6317NZ View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
FDG6317NZ Datasheet PDF : 5 Pages
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Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSS
Gate–Body Leakage
IGSS
Gate–Body Leakage
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 16 V, VGS = 0 V
VGS = ± 12 V, VDS = 0 V
VGS = ± 4.5 V, VDS = 0 V
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS
Forward Transconductance
VDS = VGS, ID = 250 µA
ID = –250 µA, Referenced to 25°C
VGS = 4.5 V,
VGS = 2.5 V,
VGS = 4.5 V,
VGS = 4.5 V,
VDS = 5 V,
ID = 0.7 A
ID = 0.6 A
ID = 0.7 A, TJ=125°C
VDS = 5 V
ID = 0.7 A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
VDS = 10 V, V GS = 0 V,
f = 1.0 MHz
VGS = 15 mV, f = 1.0 MHz
Switching Characteristics (Note 2)
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6 Ω
VDS = 10 V, ID = 0.7 A,
VGS = 4.5 V
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = 0.25 A (Note 2)
Voltage
trr
Diode Reverse Recovery Time IF = 0.7 A, diF/dt = 100 A/µs
Qrr
Diode Reverse Recovery Charge
20
V
13
mV/°C
1
µA
± 10 µA
±1
µA
0.6 1.2 1.5
V
–2
mV/°C
300 400 mΩ
450 550
390 560
1
A
1.8
S
66.5
pF
19
pF
10
pF
5.8
Ω
5.5 11
ns
7
15
ns
7.5 15
ns
2.5
5
ns
0.76 1.1
nC
0.18
nC
0.20
nC
0.25
A
0.8 1.2
V
8.3
nS
1.2
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. RθJA = 415°C/W when mounted on a minimum pad .
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDG6317NZ Rev B (W)
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