FAN8303 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
FAN8303 Datasheet PDF : 12 Pages
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Soft-Start
A capacitor, CSS, connected between the SS pin and
GND helps control the rate of rise on the output voltage.
When EN is HIGH and VIN is within the operating range,
a trimmed bias current charges the capacitor connected
to the SS pin, causing the voltage to rise.
The time it takes this voltage to reach 0.6V and the
PWM output to reach regulation is given by:
tRISE (ms) ≈ 0.1• CSS
(5)
where CSS is in nF.
Loop Compensation
The goal of the compensation design is to shape the
converter frequency response to achieve high DC gain
and fast transient, while maintaining loop stability.
FAN8303 employs peak current-mode control for fast
transient response and to help simplify the loop to a
one-pole and one-zero system.
The system pole is calculated by the equation:
fP1
=
2π
1
⋅ COUT
⋅ RL
(6)
where RL is the load resistor value (VOUT/IOUT).
The system zero is due to the output capacitor and its
ESR system zero is calculated by following equation:
fz1
=
2π
1
⋅ COUT
⋅ ESR
(7)
The characteristics of the control system are controlled
by a series capacitor and resistor network connected to
the COMP pin to set the pole and zero.
The pole is calculated by the following equation:
fp2
=
2π
GEA
⋅ CC ⋅ AVEA
(8)
where:
GEA is the error amplifier transconductance (380µA/V);
AVEA is the error amplifier voltage gain (400V/V); and
CC is the compensation capacitor.
Zero is due to the compensation capacitor (CC) and
resistor (RC) calculated by the following equation:
fz2
=
2π
1
⋅ CC
⋅ RC
(9)
where RC is compensation resistor.
The system crossover frequency (fC), where the control
loop has unity gain, is recommended for setting the
1/10th of switching frequency. Generally, higher fC
means faster response to load transients, but can result
in instability if not properly compensated.
The first step of the compensation design is choosing
the compensation resistor (RC) to set the crossover
frequency by the following equation:
RC
=
2π ⋅ COUT ⋅ fC ⋅VOUT
GCS ⋅ GEA ⋅VFB
(10)
where VFB is reference voltage and GCS is the current
sense gain, which is roughly the output current divided
by the voltage at COMP (2A/V).
The next step is choosing the compensation capacitor
(CC) to achieve the desired phase margin. For
applications with typical inductor values, setting the
compensation zero, fZ2, to below one fourth of the
crossover frequency provides sufficient phase margin.
Determine the (CC) value by the following equation:
CC
=
π
2
⋅ RC
⋅ fC
(11)
Determine if the second compensation capacitor (CA) is
required. It is required if the ESR zero of the output
capacitor is located at less than half of the switching
frequency.
1
< fS
2π ⋅COUT ⋅ ESR 2
(12)
If required, add the second compensation capacitor
(CA) to set the pole fP3 at the location of the ESR zero.
Determine the (CA) value by the equation:
CA
=
COUT ⋅ ESR
RC
(13)
FAN8303
SW
VO
PWM
modulator
COMP
RC
CC
_
FB
+
0.6V
CA
Figure 16. Block Diagram of Compensation
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
9
www.fairchildsemi.com
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