LTC4266IGW View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC4266IGW

Quad IEEE 802.3at Power over Ethernet Controller

Linear Technology 

LTC4266

OPERATION

more power that the PSE has available. The classification

step is optional; if a PSE chooses not to classify a PD, it

must assume that the PD is a 13W (full 802.3af power)

device.

New in 802.3at

The newer 802.3at standard supersedes 802.3af and brings

several new features:

• A PD may draw as much as 25.5W. Such PDs (and the

PSEs that support them) are known as Type 2. Older

13W 802.3af equipment is classified as Type 1. Type 1

PDs will work with all PSEs; Type 2 PDs may require

Type 2 PSEs to work properly. The LTC4266 is designed

to work in both Type 1 and Type 2 PSE designs, and

also supports non-standard configurations at higher

power levels.

• The Classification protocol is expanded to allow Type 2

PSEs to detect Type 2 PDs, and to allow Type 2 PDs to

determine if they are connected to a Type 2 PSE. Two

versions of the new Classification protocol are avail-

able: an expanded version of the 802.3af Class Pulse

protocol, and an alternate method integrated with the

existing LLDP protocol (using the Ethernet data path).

The LTC4266 fully supports the new Class Pulse protocol

and is also compatible with the LLDP protocol (which

is implemented in the data communications layer, not

in the PoE circuitry).

• Fault protection current levels and timing are adjusted

to reduce peak power in the MOSFET during a fault;

this allows the new 25.5W power levels to be reached

using the same MOSFETs as older 13W designs.

BACKWARDS COMPATIBILITY

The LTC4266 is designed to be backward compatible with

earlier PSE chips in both software and pin functions. Exist-

ing systems using either the LTC4258 or LTC4259A (or

compatible) devices can be substituted with the LTC4266

without software or PCB layout changes; only minor BOM

changes are required to implement a fully compliant

802.3at design.

Because of the backwards compatibility features, some of

the internal registers are redundant or unused when the

LTC4266 is operated as recommended. For more details

on usage in compatibility mode, refer to the LTC4258/

LTC4259A device datasheets.

Special Compatibility Mode Notes

• The LTC4266 can use either 0.5Ω or 0.25Ω sense

resistors, while the LTC425x chips always used 0.5Ω.

To maintain compatibility, if the AUTO pin is low when

the LTC4266 powers up it assumes the sense resistor

is 0.5Ω; if it is high at power up, the LTC4266 assumes

0.25Ω. The resistor value setting can be reconfigured

at any time after power up. In particular, systems that

use 0.25Ω sense resistors and have AUTO tied low

must reconfigure the resistor settings after power up.

• The LTC4259A included both AC and DC disconnect

sensing circuitry, but the LTC4266 has only DC discon-

nect sensing. For the sake of compatibility, register

bits used to enable AC disconnect in the LTC4259A are

implemented in the LTC4266, but they simply mirror

the bits used for DC disconnect.

• The LTC4258 and LTC4259A required 10k resistors

between the OUTn pins and the drains of the external

MOSFETs. These resistors must be shorted or replaced

with zero ohm jumpers when using the LTC4266.

• The LTC4258 and LTC4259A included a BYP pin, de-

coupled to AGND with 0.1µF. This pin changes to the MID

pin on the LTC4266. The capacitor should be removed

for Endspan applications, or replaced with a zero ohm

jumper for Midspan applications.

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