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LPC1311FHN33 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
LPC1311FHN33 Datasheet PDF : 74 Pages
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NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
Table 4. LPC1311/13/42/43 HVQFN33 pin description table …continued
Symbol
Pin Start Type Reset Description
logic
state
input
[1]
SWCLK/PIO0_10/ 19[3] yes I
I; PU SWCLK — Serial wire clock.
SCK0/
CT16B0_MAT2
I/O -
I/O -
PIO0_10 — General purpose digital input/output pin.
SCK0 — Serial clock for SSP0.
O-
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
R/PIO0_11/AD0/
CT32B0_MAT3
21[5] yes -
I; PU R — Reserved. Configure for an alternate function in the IOCONFIG
block.
I/O -
PIO0_11 — General purpose digital input/output pin.
I
-
AD0 — A/D converter, input 0.
O-
CT32B0_MAT3 — Match output 3 for 32-bit timer 0.
R/PIO1_0/AD1/
CT32B1_CAP0
22[5] yes -
I; PU R — Reserved. Configure for an alternate function in the IOCONFIG
block.
I/O -
PIO1_0 — General purpose digital input/output pin.
I
-
AD1 — A/D converter, input 1.
I
-
CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
R/PIO1_1/AD2/
CT32B1_MAT0
23[5] yes -
I; PU R — Reserved. Configure for an alternate function in the IOCONFIG
block.
I/O -
PIO1_1 — General purpose digital input/output pin.
I
-
AD2 — A/D converter, input 2.
O-
CT32B1_MAT0 — Match output 0 for 32-bit timer 1.
R/PIO1_2/AD3/
CT32B1_MAT1
24[5] yes -
I; PU R — Reserved. Configure for an alternate function in the IOCONFIG
block.
I/O -
PIO1_2 — General purpose digital input/output pin.
I
-
AD3 — A/D converter, input 3.
O-
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO/PIO1_3/
AD4/
CT32B1_MAT2
25[5] yes I/O I; PU SWDIO — Serial wire debug input/output.
I/O -
PIO1_3 — General purpose digital input/output pin.
I
-
AD4 — A/D converter, input 4.
O-
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_4/AD5/
CT32B1_MAT3/
WAKEUP
26[5] yes I/O I; PU PIO1_4 — General purpose digital input/output pin.
I
-
AD5 — A/D converter, input 5.
O-
CT32B1_MAT3 — Match output 3 for 32-bit timer 1.
I
-
WAKEUP — Deep power-down mode wake-up pin with 20 ns glitch filter.
This pin must be pulled HIGH externally to enter Deep power-down mode
and pulled LOW to exit Deep power-down mode. A LOW-going pulse as
short as 50 ns wakes up the part.
PIO1_5/RTS/
CT32B0_CAP0
30[3] yes I/O I; PU PIO1_5 — General purpose digital input/output pin.
O-
RTS — Request To Send output for UART.
I
-
CT32B0_CAP0 — Capture input 0 for 32-bit timer 0.
PIO1_6/RXD/
CT32B0_MAT0
31[3] yes I/O I; PU PIO1_6 — General purpose digital input/output pin.
I
-
RXD — Receiver input for UART.
O-
CT32B0_MAT0 — Match output 0 for 32-bit timer 0.
LPC1311_13_42_43
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 6 June 2012
© NXP B.V. 2012. All rights reserved.
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