CXD2500BQ View Datasheet(PDF) - Sony Semiconductor
Part Name
Description
Manufacturer
CXD2500BQ Datasheet PDF : 48 Pages
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CXD2500BQ
Pin
Symbol
No.
41 DA09
42 DA08
43 DA07
44 DA06
45 DA05
46 DA04
47 DA03
48 DA02
49 DA01
50 APTR
51 APTL
52 VSS
53 XTAI
54 XTAO
55 XTSL
56 FSTT
57 C4M
58 C16M
59 MD2
60 DOUT
61 EMPH
62 WFCK
63 SCOR
64 SBSO
65 EXCK
66 SQSO
67 SQCK
68 MUTE
69 SENS
70 XRST
71 DATA
72 XLAT
73
VDD
74 CLOCK
75 SEIN
76 CNIN
77 DATO
78 XLTO
79 CLKO
80 MIRR
I/O
Description
O
1, 0 Outputs DA9 when PSSL=1, or XPLCK when PSSL=0.
O
1, 0 Outputs DA8 when PSSL=1, or GFS when PSSL=0.
O
1, 0 Outputs DA7 when PSSL=1, or RFCK when PSSL=0.
O
1, 0 Outputs DA6 when PSSL=1, or C2PO when PSSL=0.
O
1, 0 Outputs DA5 when PSSL=1, or XRAOF when PSSL=0.
O
1, 0 Outputs DA4 when PSSL=1, or MNT3 when PSSL=0.
O
1, 0 Outputs DA3 when PSSL=1, or MNT2 when PSSL=0.
O
1, 0 Outputs DA2 when PSSL=1, or MNT1 when PSSL=0.
O
1, 0 Outputs DA1 when PSSL=1, or MNT0 when PSSL=0.
O
1, 0 Control output for aperture correction. “H” for R-ch.
O
1, 0 Control output for aperture correction. “H” for L-ch.
GND
I
Input for 16.9344 MHz and 33.8688 MHz X'tal oscillation circuit.
O
1, 0 Output for 16.9344 MHz X'tal oscillation circuit.
I
X'tal selection input. “L” for 16.9344 MHz X'tal, “H” for 33.8688 MHz X'tal.
2/3 frequency demultiplication output for Pins 53 and 54. Unaffected by
O
1, 0
vari-pitch control.
O
1, 0 4.2336 MHz output. Subject to vari-pitch control.
O
1, 0 16.9344 MHz output. Subject to vari-pitch control.
I
Digital-Out ON/OFF control. “H” for ON, “L” for OFF.
O
1, 0 Digital-Out output.
O
1, 0 “H” for playback disc provided with emphasis, “L” for without emphasis.
O
1, 0 WFCK (Write Frame Clock) output.
O
1, 0 “H” when subcode Sync S0 or S1 is detected.
O
1, 0 Serial output of Sub P to W
I
Clock input for reading SBSO
O
1, 0 Outputs 80-bit Sub Q and 16-bit PCM peak-level data.
I
Clock input for reading SQSO
I
“H” for muting, “L” for release.
— 1, Z, 0 SENS output to CPU
I
System reset. “L” for resetting.
I
Inputs serial data from CPU.
I
Latches serial data input from CPU at falling edge.
Power supply (+5 V)
I
Inputs serial data transfer clock from CPU.
I
Inputs SENSE from SSP.
I
Inputs track jump count signal.
O
1, 0 Outputs serial data to SSP.
O
1, 0 Latches serial data output to SSP at falling edge.
O
1, 0 Outputs serial data transfer clock to SSP.
Inputs mirror signal to be used by auto sequencer when jumping 16 or
I
more tracks.
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