BD82B65 View Datasheet(PDF) - Intel
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Description
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BD82B65 Datasheet PDF : 934 Pages
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13 LPC Interface Bridge Registers (D31:F0) ............................................................... 449
13.1 PCI Configuration Registers (LPC I/F—D31:F0) .................................................... 449
13.1.1 VID—Vendor Identification Register (LPC I/F—D31:F0) ........................... 450
13.1.2 DID—Device Identification Register (LPC I/F—D31:F0) ........................... 450
13.1.3 PCICMD—PCI COMMAND Register (LPC I/F—D31:F0) ............................. 451
13.1.4 PCISTS—PCI Status Register (LPC I/F—D31:F0) .................................... 451
13.1.5 RID—Revision Identification Register (LPC I/F—D31:F0) ......................... 452
13.1.6 PI—Programming Interface Register (LPC I/F—D31:F0) .......................... 452
13.1.7 SCC—Sub Class Code Register (LPC I/F—D31:F0) .................................. 453
13.1.8 BCC—Base Class Code Register (LPC I/F—D31:F0)................................. 453
13.1.9 PLT—Primary Latency Timer Register (LPC I/F—D31:F0)......................... 453
13.1.10 HEADTYP—Header Type Register (LPC I/F—D31:F0)............................... 453
13.1.11 SS—Sub System Identifiers Register (LPC I/F—D31:F0).......................... 454
13.1.12 PMBASE—ACPI Base Address Register (LPC I/F—D31:F0) ....................... 454
13.1.13 ACPI_CNTL—ACPI Control Register (LPC I/F — D31:F0) .......................... 455
13.1.14 GPIOBASE—GPIO Base Address Register (LPC I/F — D31:F0) .................. 455
13.1.15 GC—GPIO Control Register (LPC I/F — D31:F0) ..................................... 456
13.1.16 PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control Register
(LPC I/F—D31:F0) ............................................................................. 457
13.1.17 SIRQ_CNTL—Serial IRQ Control Register
(LPC I/F—D31:F0) ............................................................................. 458
13.1.18 PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control Register
(LPC I/F—D31:F0) ............................................................................. 459
13.1.19 LPC_IBDF—IOxAPIC Bus:Device:Function
(LPC I/F—D31:F0) ............................................................................. 459
13.1.20 LPC_HnBDF—HPET n Bus:Device:Function
(LPC I/F—D31:F0) ............................................................................. 460
13.1.21 LPC_I/O_DEC—I/O Decode Ranges Register
(LPC I/F—D31:F0) ............................................................................. 461
13.1.22 LPC_EN—LPC I/F Enables Register (LPC I/F—D31:F0)............................. 462
13.1.23 GEN1_DEC—LPC I/F Generic Decode Range 1 Register
(LPC I/F—D31:F0) ............................................................................. 463
13.1.24 GEN2_DEC—LPC I/F Generic Decode Range 2 Register
(LPC I/F—D31:F0) ............................................................................. 463
13.1.25 GEN3_DEC—LPC I/F Generic Decode Range 3 Register
(LPC I/F—D31:F0) ............................................................................. 464
13.1.26 GEN4_DEC—LPC I/F Generic Decode Range 4 Register
(LPC I/F—D31:F0) ............................................................................. 464
13.1.27 ULKMC — USB Legacy Keyboard / Mouse
Control Register (LPC I/F—D31:F0)...................................................... 465
13.1.28 LGMR — LPC I/F Generic Memory Range Register
(LPC I/F—D31:F0) ............................................................................. 466
13.1.29 BIOS_SEL1—BIOS Select 1 Register
(LPC I/F—D31:F0) ............................................................................. 467
13.1.30 BIOS_SEL2—BIOS Select 2 Register
(LPC I/F—D31:F0) ............................................................................. 468
13.1.31 BIOS_DEC_EN1—BIOS Decode Enable
Register (LPC I/F—D31:F0)................................................................. 469
13.1.32 BIOS_CNTL—BIOS Control Register
(LPC I/F—D31:F0) ............................................................................. 471
13.1.33 FDCAP—Feature Detection Capability ID Register
(LPC I/F—D31:F0) ............................................................................. 472
13.1.34 FDLEN—Feature Detection Capability Length Register
(LPC I/F—D31:F0) ............................................................................. 472
13.1.35 FDVER—Feature Detection Version Register
(LPC I/F—D31:F0) ............................................................................. 472
13.1.36 FVECIDX—Feature Vector Index Register
(LPC I/F—D31:F0) ............................................................................. 472
13.1.37 FVECD—Feature Vector Data Register
(LPC I/F—D31:F0) ............................................................................. 473
13.1.38 Feature Vector Space ......................................................................... 473
13.1.38.1 FVEC0—Feature Vector Register 0 ........................................ 473
13.1.38.2 FVEC1—Feature Vector Register 1 ........................................ 474
13.1.38.3 FVEC2—Feature Vector Register 2 ........................................ 474
13.1.38.4 FVEC3—Feature Vector Register 3 ........................................ 475
13.1.39 RCBA—Root Complex Base Address Register
(LPC I/F—D31:F0) ............................................................................. 475
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