17.2.14WALCLKāWall Clock Counter Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 722
17.2.15SSYNCāStream Synchronization Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 723
17.2.16CORBLBASEāCORB Lower Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 723
17.2.17CORBUBASEāCORB Upper Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 724
17.2.18CORBWPāCORB Write Pointer Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 724
17.2.19CORBRPāCORB Read Pointer Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 724
17.2.20CORBCTLāCORB Control Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 725
17.2.21CORBSTāCORB Status Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 725
17.2.22CORBSIZEāCORB Size Register
IntelĀ® High Definition Audio ControllerāD27:F0) ...................................... 725
17.2.23RIRBLBASEāRIRB Lower Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 726
17.2.24RIRBUBASEāRIRB Upper Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 726
17.2.25RIRBWPāRIRB Write Pointer Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 726
17.2.26RINTCNTāResponse Interrupt Count Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 727
17.2.27RIRBCTLāRIRB Control Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 727
17.2.28RIRBSTSāRIRB Status Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 728
17.2.29RIRBSIZEāRIRB Size Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 728
17.2.30ICāImmediate Command Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 728
17.2.31IRāImmediate Response Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 729
17.2.32IRSāImmediate Command Status Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 729
17.2.33DPLBASEāDMA Position Lower Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 730
17.2.34DPUBASEāDMA Position Upper Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 730
17.2.35SDCTLāStream Descriptor Control Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 731
17.2.36SDSTSāStream Descriptor Status Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 733
17.2.37SDLPIBāStream Descriptor Link Position in Buffer
Register (IntelĀ® High Definition Audio ControllerāD27:F0) ........................ 734
17.2.38SDCBLāStream Descriptor Cyclic Buffer Length Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 734
17.2.39SDLVIāStream Descriptor Last Valid Index Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 735
17.2.40SDFIFOWāStream Descriptor FIFO Watermark Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 735
17.2.41SDFIFOSāStream Descriptor FIFO Size Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 736
17.2.42SDFMTāStream Descriptor Format Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 737
17.2.43SDBDPLāStream Descriptor Buffer Descriptor List
Pointer Lower Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 738
17.2.44SDBDPUāStream Descriptor Buffer Descriptor List
Pointer Upper Base Address Register
(IntelĀ® High Definition Audio ControllerāD27:F0)..................................... 738
18 SMBus Controller Registers (D31:F3) .................................................................... 739
18.1 PCI Configuration Registers (SMBusāD31:F3)..................................................... 739
Datasheet
21