PIN CONFIGURATION
NJU6433B
B
TERMINAL DESCRIPTION
No.
1~50
61~64
51
52
53
54
55
SYMBOL
SEG1~SEG50
COM4~COM1
OSC1
OSC2
VDD
VSS
VLCD
56
CE
57
SCL
58
DATA
59
MODE
60
INHb
FUNCTION
LCD Segment Output Terminals
LCD Common Output Terminals
Oscillation Terminals :
External resistance is connected to these terminals.
Power Supply (+5V)
Power Supply (0V)
Power Supply for LCD Driving
The relation : 1.3VDD ≥ |VDD - VLCD|, VSS ≥ VLCD must be maintained.
Chip Enable Signal Input Terminal :
"H" : LCD display data and mode setting data input
"L" : Disable
Fall Edge : LCD display data latch
Serial Data Transmission Clock Input Terminal :
LCD display and Mode setting data are input synchronized
SCL clock signal rise edge.
Serial Data Input Terminal
Data input timing : SCL clock rise edge
Data or Mode Select Terminal
"H" : Data input mode
"L" : LCD display data input mode
(Refer the mode setting table for mode setting contents)
Display-Off Control Terminal :
When display goes to off, the display data in the shift-register is
retained.
"H" : Display-On
"L" : Display-Off
Ver.2012-10-23
-3-