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ST7FLITEU05B3 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ST7FLITEU05B3 Datasheet PDF : 115 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ST7LITEU05 ST7LITEU09
Address
0040h to
0046h
0047h
0048h
0049h
004Ah
004Bh
004Ch
004Dh
004Eh
004Fh
0050h
0051h to
007Fh
Block
MuxIO-
reset
AWU
DM 3)
Register
Label
MUXCR0
MUXCR1
AWUPR
AWUCSR
DMCR
DMSR
DMBK1H
DMBK1L
DMBK2H
DMBK2L
Register Name
Reserved area (7 bytes)
Mux IO-Reset Control Register 0
Mux IO-Reset Control Register 1
AWU Prescaler Register
AWU Control/Status Register
DM Control Register
DM Status Register
DM Breakpoint Register 1 High
DM Breakpoint Register 1 Low
DM Breakpoint Register 2 High
DM Breakpoint Register 2 Low
Reserved area (47 bytes)
Reset Status Remarks
00h
R/W
00h
R/W
FFh
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
Legend: x=undefined, R/W=read/write
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-
tion, the values of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always keep their reset value.
3. For a description of the DM registers, see the ST7 ICC Protocol Reference Manual.
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