Product overview
STM8AF61xx, STM8AF62xx
5.8
Analog-to-digital converter (ADC)
The STM8A products described in this datasheet contain a 10-bit successive approximation
ADC with up to 16 multiplexed input channels, depending on the package.
The ADC name differs between the datasheet and the STM8A/S reference manual (see
Table 7).
Table 7. ADC naming
Peripheral name in datasheet
ADC
Peripheral name in reference manual
(RM0016)
ADC1
Note:
ADC features
● 10-bit resolution
● Single and continuous conversion modes
● Programmable prescaler: fMASTER divided by 2 to 18
● Conversion trigger on timer events and external events
● Interrupt generation at end of conversion
● Selectable alignment of 10-bit data in 2 x 8 bit result register
● Shadow registers for data consistency
● ADC input range: VSSA ≤VIN ≤VDDA
● Analog watchdog
● Schmitt-trigger on analog inputs can be disabled to reduce power consumption
● Scan mode (single and continuous)
● Dedicated result register for each conversion channel
● Buffer mode for continuous conversion
An additional AIN12 analog input is not selectable in ADC scan mode or with analog
watchdog. Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL
registers.
5.9
Communication interfaces
The following sections give a brief overview of the communication peripheral. Some
peripheral names differ between the datasheet and the STM8A/S reference manual (see
Table 8).
Table 8. Communication peripheral naming correspondence
Peripheral name in datasheet
Peripheral name in reference manual
(RM0016)
LINUART
UART2
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Doc ID 14952 Rev 6