MICRF002BM View Datasheet(PDF) - Micrel

Part Name

Description

Manufacturer

MICRF002BM

300-440MHz QwikRadio™ASK Receiver

Micrel 

MICRF002/RF022

Step 3: Selecting The CTH Capacitor

Extraction of the dc value of the demodulated signal for

purposes of logic-level data slicing is accomplished using the

external threshold capacitor CTH and the on-chip switched-

capacitor “resistor” RSC, shown in the block diagram.

Slicing level time constant values vary somewhat with de-

coder type, data pattern, and data rate, but typically values

range from 5ms to 50ms. Optimization of the value of CTH is

required to maximize range.

Selecting Capacitor CTH

The first step in the process is selection of a data-slicing-level

time constant. This selection is strongly dependent on sys-

tem issues including system decode response time and data

code structure (that is, existence of data preamble, etc.). This

issue is covered in more detail in Application Note 22.

The effective resistance of RSC is listed in the electrical

characteristics table as 145kΩ at 315MHz, this value scales

linearly with frequency. Source impedance of the CTH pin at

other frequencies is given by equation (4), where fT is in MHz:

(4)

RSC

=

145kΩ

4.8970

fT

τ of 5x the bit-rate is recommended. Assuming that a slicing

level time constant τ has been established, capacitor CTH

may be computed using equation

(5)

CTH

=

τ

RSC

A standard ±20% X7R ceramic capacitor is generally suffi-

cient. Refer to Application Hint 42 for CTH and CAGC selection

examples.

Step 4: Selecting The CAGC Capacitor

The signal path has AGC (automatic gain control) to increase

input dynamic range. The attack time constant of the AGC is

set externally by the value of the CAGC capacitor connected

to the CAGC pin of the device. To maximize system range, it

is important to keep the AGC control voltage ripple low,

preferably under 10mVpp once the control voltage has at-

tained its quiescent value. For this reason capacitor values of

at least 0.47µF are recommended.

The AGC control voltage is carefully managed on-chip to

allow duty-cycle operation of the MICRF002. When the

device is placed into shutdown mode (SHUT pin pulled high),

the AGC capacitor floats to retain the voltage. When opera-

tion is resumed, only the voltage droop due to capacitor

leakage must be replenished. A relatively low-leakage ca-

pacitor is recommended when the devices are used in duty-

cycled operation.

To further enhance duty-cycled operation, the AGC push and

pull currents are boosted for approximately 10ms immedi-

ately after the device is taken out of shutdown. This compen-

sates for AGC capacitor voltage droop and reduces the time

to restore the correct AGC voltage. The current is boosted by

a factor of 45.

Micrel

Selecting CAGC Capacitor in Continuous Mode

A CAGC capacitor in the range of 0.47µF to 4.7µF is typically

recommended. The value of the CAGC should be selected to

minimize the ripple on the AGC control voltage by using a

sufficiently large capacitor. However if the capacitor is too

large the AGC may react too slowly to incoming signals. AGC

settling time from a completely discharged (zero-volt) state is

given approximately by Equation 6:

(6) ∆t = 1.333CAGC − 0.44

where:

CAGC is in µF, and ∆t is in seconds.

Selecting CAGC Capacitor in Duty-Cycle Mode

Voltage droop across the CAGC capacitor during shutdown

should be replenished as quickly as possible after the IC is

enabled. As mentioned above, the MICRF002 boosts the

push-pull current by a factor of 45 immediately after start-up.

This fixed time period is based on the reference oscillator

frequency fT. The time is 10.9ms for fT = 6.00MHz, and varies

inversely with fT. The value of CAGC capacitor and the

duration of the shutdown time period should be selected such

that the droop can be replenished within this 10ms period.

Polarity of the droop is unknown, meaning the AGC voltage

could droop up or down. Worst-case from a recovery stand-

point is downward droop, since the AGC pull-up current is

1/10th magnitude of the pulldown current. The downward

droop is replenished according to the Equation 7:

(7)

I = ∆V

CAGC ∆t

where:

I = AGC pullup current for the initial 10ms (67.5µA)

CAGC = AGC capacitor value

∆t = droop recovery time

∆V = droop voltage

For example, if user desires ∆t = 10ms and chooses a 4.7µF

CAGC, then the allowable droop is about 144mV. Using the

same equation with 200nA worst case pin leakage and

assuming 1µA of capacitor leakage in the same direction, the

maximum allowable ∆t (shutdown time) is about 0.56s for

droop recovery in 10ms.

The ratio of decay-to-attack time-constant is fixed at 10:1

(that is, the attack time constant is 1/10th of the decay time

constant). Generally the design value of 10:1 is adequate for

the vast majority of applications. If adjustment is required the

constant may be varied by adding a resistor in parallel with the

CAGC capacitor. The value of the resistor must be determined

on a case by case basis.

Step 5: Selecting The Demod Filter

Bandwidth

The inputs SEL0 and SEL1 control the demodulator filter

bandwidth in four binary steps (625Hz to 5000Hz in sweep,

1250Hz to 10000Hz in fixed mode), see Table 1. Bandwidth

must be selected according to the application. The demodu-

lator bandwidth should be set according to equation 8.

March 2003

9

MICRF002/RF022

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