IT8712F View Datasheet(PDF) - ITE Tech. INC.

Part Name

Description

Manufacturer

IT8712F

Environment Control – Low Pin Count Input / Output(EC - LPC I/O)

ITE Tech. INC. 

Contents

Table 9-18. VERIFY Command Result ........................................................................................................... 113

Table 9-19. Interrupt Identification................................................................................................................... 116

Table 9-20. HUT Values .................................................................................................................................. 116

Table 9-21. SRT Values .................................................................................................................................. 116

Table 9-22. HLT Values .................................................................................................................................. 117

Table 9-23. Effects of GAP and WG on FORMAT A TRACK and WRITE DATA Commands ....................... 117

Table 9-24. Effects of Drive Mode and Data Rate on FORMAT A TRACK and WRITE DATA Commands .. 117

Table 9-25. Serial Channel Registers.............................................................................................................. 119

Table 9-26. Interrupt Enable Register Description .......................................................................................... 120

Table 9-27. Interrupt Identification Register .................................................................................................... 121

Table 9-28. FIFO Control Register Description ............................................................................................... 122

Table 9-29. Receiver FIFO Trigger Level Encoding........................................................................................ 122

Table 9-30. Baud Rates Using (24 MHz ÷ 13) Clock ...................................................................................... 123

Table 9-31. Line Control Register Description ................................................................................................ 124

Table 9-32. Stop Bits Number Encoding ......................................................................................................... 124

Table 9-33. Modem Control Register Description ........................................................................................... 125

Table 9-34. Line Status Register Description.................................................................................................. 125

Table 9-35. Modem Status Register Description............................................................................................. 126

Table 9-36. Reset Control of Registers and Pinout Signals ............................................................................ 127

Table 9-37. SCRCLK Selections ..................................................................................................................... 130

Table 9-38. Parallel Port Connector in Different Modes.................................................................................. 134

Table 9-39. Address Map and Bit Map for SPP and EPP Modes ................................................................... 134

Table 9-40. Bit Map of the ECP Registers ...................................................................................................... 137

Table 9-41. ECP Register Definitions.............................................................................................................. 137

Table 9-42. ECP Mode Descriptions ............................................................................................................... 138

Table 9-43. ECP Pin Descriptions ................................................................................................................... 138

Table 9-44. Extended Control Register (ECR) Mode and Description ............................................................ 140

Table 9-45. Data Register READ/WRITE Controls ......................................................................................... 144

Table 9-46. Status Register............................................................................................................................. 144

Table 9-47. List of CIR Registers .................................................................................................................... 147

Table 9-48. Modulation Carrier Frequency...................................................................................................... 152

Table 9-49. Receiver Demodulation Low Frequency (HCFS = 0) ................................................................... 153

Table 9-50. Receiver Demodulation High Frequency (HCFS = 1) .................................................................. 154

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IT8712F V0.81

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