AD722 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD722

RGB to NTSC/PAL Encoder

Analog Devices 

AD722

The other analog path is the chrominance path which is where

the U and V color difference signals are processed. The U and V

signals first pass through 4-pole modified Bessel low-pass filters

with –3 dB frequencies of 1.2 MHz/1.5 MHz (NTSC/PAL) to

prevent aliasing in the modulators. The color burst signal is in-

jected into the U and V channels in these premodulation filters.

The U and V signals are then modulated independently by a

pair of balanced switching modulators driven in quadrature by

the color subcarrier.

The bandwidths of all the on-chip filters are tuned using propri-

etary auto-tuning circuitry. The basic principle is to match an

RC time constant to a reference time period, that time being

one cycle of a subcarrier clock. The auto-tuning is done during

the vertical blanking interval and has some added hysteresis so

that once an acceptable tuning value is reached the part won’t

toggle between tuning values from field to field. The band-

widths stated in the above discussion are the design target band-

widths for NTSC and PAL.

The AD722’s 4FSC clock (either produced by the on-chip PLL

or user supplied) drives a digital divide-by-4 circuit to create the

quadrature signals for modulation. The reference phase 0° is

used for the U signal. In the NTSC mode, the V signal is modu-

lated at 90°, but in PAL mode, the V modulation alternates be-

tween 90° and 270° at half the line rate as required by the PAL

standard. The outputs of the U and V balanced modulators

are summed and passed through a 3-pole low-pass filter with

3.6 MHz/4.4 MHz bandwidths (NTSC/PAL) in order to re-

move the harmonics generated during the switching modulation.

The filtered chrominance signal is then summed with the fil-

tered luminance signal to create the composite video signal. The

separate luminance, chrominance, and composite video signals

are amplified by a factor of two in order to drive 75 Ω reverse-

terminated lines. The separate luminance and chrominance out-

puts together are known as S-video. The composite and S-video

outputs are simultaneously available.

The two sync inputs HSYNC and VSYNC are fed into an

XNOR gate to create a CSYNC signal for the AD722. If the

user produces, or has access to, a true composite sync signal, it

can be input to the HSYNC pin while the VSYNC pin is held

high. In either case the CSYNC signal which is present after the

XNOR gate, is used to generate the sync and burst signals

which ultimately get injected into the analog signal chain. The

unclocked CSYNC signal is sent to a reference cell on the chip

which, when CSYNC is low, allows a reference voltage (based

on a power supply division) to be injected into the luminance

chain. The width of the injected sync is the same as the width of

the supplied sync signal.

The CSYNC signal (after the XNOR gate) also goes to the digi-

tal section of the AD722 where it is clocked in by a 2FSC clock.

The digital section then measures the width of the CSYNC

pulses to separate horizontal pulses from vertical equalizing and

serration pulses. A burst flag is generated only after valid hori-

zontal sync pulses and is timed from the falling edge of the

clocked-in CSYNC signal. In synchronous systems (those in

which the subcarrier clock, sync signals, and RGB signals are all

synchronous) this will give a fixed burst position relative to the

falling edge of the output sync. However, in asynchronous sys-

tems the sync to burst position can change line to line by as

much as 140 ns (the period of a 2FSC clock cycle) due to the

fact that the burst flag is generated from a clocked CSYNC while

the sync is injected unclocked. This phenomenon may or may not

create visual artifacts in some high-end video systems. The burst

flag which is generated goes to the reference cell and allows a refer-

ence voltage to be inserted to the U and V low-pass filters.

APPLYING THE AD722

Inputs

RIN, BIN, GIN are analog inputs that should be terminated to

ground with 75 Ω in close proximity to the IC. When properly

terminated the peak-to-peak voltage for a maximum input level

should be 714 mV p-p for NTSC or 700 mV p-p for PAL. The

horizontal blanking interval should be the most negative part of

each signal.

The signal should be flat during the horizontal blanking interval.

Internal circuitry will clamp this level during HSYNC to a refer-

ence that is used internally as the black level. The horizontal

blanking level at the input pins can range between 0 V and 3 V

with respect to the ground level of the AD722.

HSYNC and VSYNC are two logic level inputs that are com-

bined internally to produce a composite sync signal. If a com-

posite sync signal is to be used, it can be input to HSYNC while

VSYNC is pulled to logic HI (+5 V).

The form of the input sync signal(s) will determine the form of

the composite sync on the composite video (COMP) and lumi-

nance (LUMA) outputs. If no equalization or serration pulses

are included in the HSYNC input there won’t be any in the out-

puts. Although sync signals without equalization and serration

pulses do not technically meet the video standards’ specifica-

tions, many monitors do not require these pulses in order to

display good pictures. The decision whether to include these

signals is a system tradeoff between cost and complexity and

adhering strictly to the video standards.

The SELECT input is a CMOS logic level that programs the

AD722 to use a subcarrier at a 1FSC (LO) frequency or a

4FSC (HI) frequency for the appropriate standard being used.

A 4FSC clock is used directly, while a 1FSC input is multiplied

up to 4FSC by an internal phase locked loop.

The FIN input can be a logic level clock at either FSC or 4FSC

frequency or can be a parallel resonant crystal at 1FSC fre-

quency. An on-chip oscillator will drive the crystal. Most crys-

tals will require a shunt capacitance of between 10 pF and 30

pF for reliable start up and proper frequency of operation.

The NTSC specification calls for a frequency accuracy of ±10 Hz

from the nominal subcarrier frequency of 3.579545 MHz. While

maintaining this accuracy in a broadcast studio might not be a

severe hardship, it can be quite expensive in a low cost con-

sumer application.

The AD722 will operate with subcarrier frequencies that deviate

quite far from those specified by the TV standards. However,

the monitor will in general not be quite so forgiving. Most moni-

tors can tolerate a subcarrier frequency that deviates several hun-

dred Hz from the nominal standard without any degradation in

picture quality. These conditions imply that the subcarrier fre-

quency accuracy is a system specification and not a specification

of the AD722 itself.

The STND pin is used to select between NTSC and PAL opera-

tion. Various blocks inside the AD722 use this input to program

their operation. Most of the more common variants of NTSC

and PAL are supported. There are, however, two known specific

standards which are not supported. These are NTSC 4.43 and

M-PAL.

–8–

REV. 0

Share Link: