ATF22V10BQL-25NM/883 View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATF22V10BQL-25NM/883

High-performance Electrically Erasable Programmable Logic Device

Atmel Corporation 

6. Input Test Waveforms and Measurement Levels

Atmel ATF22V10B

tR, tF < 3ns

7. Output Test Loads

Commercial

Military

* All except -7 which is R2 = 300

8. Pin Capacitance

f = 1MHz, T = 25°C(1)

Typ

Max

Units

Conditions

CIN

COUT

Note:

5

8

pF

VIN = 0V

6

8

pF

VOUT = 0V

1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested

9. Power-up Reset

The registers in the Atmel® ATF22V10B are designed to reset during power-up. At a point delayed slightly from

VCC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the out-

put buffer.

This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the

uncertainty of how VCC actually rises in the system, the following conditions are required:

1. The VCC rise must be monotonic

2. After reset occurs, all input and feedback setup times must be met before driving the clock pin high

3. The clock must remain stable during tPR

5

0250M–PLD–7/10

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