SST25VF032B View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

Manufacturer

SST25VF032B

32 Mbit SPI Serial Flash

Silicon Storage Technology 

32 Mbit SPI Serial Flash

SST25VF032B

PIN DESCRIPTION

Data Sheet

CE#

SO

WP#

VSS

1

8

2

7

Top View

3

6

VDD

HOLD#

SCK

4

5

SI

1327 8-SOIC P1.0

CE# 1

SO 2

WP# 3

VSS 4

Top View

8 VDD

7 HOLD#

6 SCK

5 SI

1327 8-WSON P1.0

Notes: 1. In AAI mode, the SO pin can act as a RY/BY# pin when configured as a ready/busy status pin. See “End-of-

Write Detection” on page 11 for details.

FIGURE 2: Pin Assignments for 8-Lead SOIC

TABLE 1: Pin Description

Symbol

SCK

Pin Name

Serial Clock

SI

SO

RY/BY#

CE#

WP#

HOLD#

VDD

VSS

Serial Data Input

Serial Data Output

Ready / Busy pin

Chip Enable

Write Protect

Hold

Power Supply

Ground

Functions

To provide the timing of the serial interface.

Commands, addresses, or input data are latched on the rising edge of the clock input,

while output data is shifted out on the falling edge of the clock input.

To transfer commands, addresses, or data serially into the device.

Inputs are latched on the rising edge of the serial clock.

To transfer data serially out of the device.

Data is shifted out on the falling edge of the serial clock.

Flash busy status pin in AAI mode if SO is configured as a hardware RY/BY# pin.

The device is enabled by a high to low transition on CE#. CE# must remain low for the

duration of any command sequence.

The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.

To temporarily stop serial communication with SPI flash memory without resetting the

device.

To provide power supply voltage: 2.7-3.6V

T1.0 1327

©2009 Silicon Storage Technology, Inc.

3

S71327-03-000

05/09

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