M38042F5KP View Datasheet(PDF) - Renesas Electronics
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Description
Manufacturer
M38042F5KP Datasheet PDF : 116 Pages
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3804 Group (Spec. H)
I/O PORTS
The I/O ports have direction registers which determine the input/
output direction of each individual pin. Each bit in a direction reg-
ister corresponds to one pin, and each pin can be set to be input
port or output port.
When “0” is written to the bit corresponding to a pin, that pin be-
comes an input pin. When “1” is written to that bit, that pin be-
comes an output pin.
If data is read from a pin which is set to output, the value of the
port output latch is read, not the value of the pin itself. Pins set to
input are floating. If a pin set to input is written to, only the port
output latch is written to and the pin remains floating.
Table 5 I/O port function
Pin
Name
P00/AN8–P07/AN15 Port P0
P10/INT41
Port P1
P11/INT01
P12–P17
P20/LED0–
P27/LED7
P30/DA1
Port P2
Port P3
P31/DA2
P32/SDA
P33/SCL
P34/RxD3
P35/TxD3
P36/SCLK3
P37/SRDY3
P40/INT40/XCIN
P41/INT00/XCOUT
Port P4
P42/INT1
P43/INT2
P44/RxD1
P45/TxD1
P46/SCLK1
P47/SRDY1/CNTR2
P50/SIN2
P51/SOUT2
P52/SCLK2
P53/SRDY2
P54/CNTR0
P55/CNTR1
P56/PWM
P57/INT3
Port P5
P60/AN0–P67/AN7 Port P6
I/O Structure
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
N-channel open-drain output
CMOS/SMBUS input level (when
selecting I2C-BUS interface function)
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
CMOS compatible input level
CMOS 3-state output
Non-Port Function
A/D converter input
External interrupt input
Related SFRs
AD/DA control register
Interrupt edge selection
register
D/A converter output
AD/DA control register
I2C-BUS interface func- I2C control register
tion I/O
Serial I/O3 function I/O
Serial I/O3 control
register
UART3 control register
External interrupt input
Sub-clock generating
circuit
External interrupt input
Serial I/O1 function I/O
Serial I/O1 function I/O
Timer Z function I/O
Serial I/O2 function I/O
Interrupt edge selection
register
CPU mode register
Interrupt edge selection
register
Serial I/O1 control
register
UART1 control register
Serial I/O1 control
register
Timer Z mode register
Serial I/O2 control
register
Timer X, Y function I/O Timer XY mode register
PWM output
External interrupt input
A/D converter input
PWM control register
Interrupt edge selection
register
AD/DA control register
Notes 1: Refer to the applicable sections how to use double-function ports as function I/O ports.
2: Make sure that the input level at each pin is either 0 V or VCC during execution of the STP instruction.
When an input level is at an intermediate potential, a current will flow from VCC to VSS through the input-stage gate.
Ref.No.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(2)
(6)
(7)
(8)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(2)
(1)
Rev.1.01 Jan 25, 2005 page 14 of 114
REJ03B0131-0101Z
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