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CXA1372BQ View Datasheet(PDF) - Sony Semiconductor

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Description
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CXA1372BQ Datasheet PDF : 32 Pages
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CXA1372BQ/BS
Note that the time from the High to Low transition of FZC to the time command $08 is asserted must be
minimized. To do this, the software sequence shown in B is better than the sequence shown in A.
FZC ?
NO
YES
F. OK ?
NO
YES
Transfer $08
Latch
Transfer $08
F. OK ?
NO
YES
FZC ?
NO
YES
Latch
(A)
(B)
Fig. 5. Poor and good software command sequences
1-3. SENS (Pin 27)
The output of the SENS pin differs depending on the input data as shown below.
$0X: FZC
$1X: AS
$2X: TZC
$3X: SSTOP
$4X to 7X: HIGH-Z
2. $1X (“AS” at SENS (Pin 27))
These commands deal with switching TG1 and TG2 ON/OFF.
The bit configuration is as follows
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
1 ANTI Break TG2 TG1
SHOCK circuit
ON/OFF ON/OFF
TG1, TG2
The purpose of these switches is to switch the tracking servo gain Up/Normal. The brake circuit (TM7) is to
prevent the frequently occurred phenomena where the merely 10-track jump has been performed actually
though a 100-track jump was intended to be done due to the extremely degraded actuator settling caused by
the servo motor exceeding the linear range after a 100 or 10-track jump.
When the actuator travels radially; that is, when it traverses from the inner track to the outer track of the disc
and vice versa, the brake circuit utilizes the fact that the phase relationship between the RF envelope and the
tracking error is 180˚out-of-phase to cut the unneeded portion of the tracking error and apply braking.
– 20 –

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