IT8510G View Datasheet(PDF) - ITE Tech. INC.
Part Name
Description
Manufacturer
IT8510G Datasheet PDF : 284 Pages
| |||
IT8510E
Table 3-1. Host/Flash Mapping
Host Memory Space
on LPC Bus (byte)
Mapped
Expansion Flash Space (byte)
Size
(byte)
Mapping
Condition
(1_0000_0000h–Flash_Size)~ 00_0000h~
Flash_Size
Always
FFFF_FFFFh
(Flash_Size-1)
SHMBA ~
(Flash_Size-User_Defined_Size)~ User_Defined_Size USRMEM=1
(SHMBA+User_Defined_Size-1) (Flash_Size-1)
( <= Flash_Size )
000F_0000h ~
(Flash_Size-01_0000h)~
64k
Always
000F_FFFFh
(Flash_Size-1)
000E_0000h ~
(Flash_Size-02_0000h)~
64k
BIOSEXTS=1
000E_FFFFh
(Flash_Size-01_0001h)
Note: The host side can map all flash range regardless of EC code space.
Note: All host mappings are controlled by LPCMEN and FWHEN bit in SHMC register.
Note: Flash Size is defined in FMSSR register, and it may be 128k, 256k, 512k, 1M, 2M and the maximum 4M bytes.
Note: User_Defined_Size is defined in SHMUSZ register.
Table 3-2. EC/Flash Mapping
EC Code
Mapped
Size Mapping
Bank Selected
Memory Space (byte)
Flash Address Range (byte) (byte) Condition
Condition
Bank 3:
8000h ~ FFFFh 02_0000h ~ 02_7FFFh
32k Always
ECBB=11
Bank 2:
8000h ~ FFFFh 01_8000h ~ 01_FFFFh
32k Always
ECBB=10
Bank 1:
8000h ~ FFFFh 01_0000h ~ 01_7FFFh
32k Always
ECBB=01
Bank 0:
8000h ~ FFFFh 00_8000h ~ 00_FFFFh
32k Always
ECBB=00
Common Bank: 0000h ~ 7FFFh 00_0000h ~ 00_7FFFh
32k Always
Always
Note: EC code can use the maximum 160k by banking.
Note: All EC code memory space is mapped to both EC and host side at the same time. The EC size is not necessary on
32k boundary.
Note: If BSO=1, ECBB is replaced with P1 register of 8032.
ECBB means ECBB field in FECBSR register.
BSO means BSO bit in FPCFG register.
Table 3-3. Flash Read/Write Protection Controlled by EC Side
Flash Address
Range (byte)
Read Control
Register Bits
Write Control
Register Bits
38_0000h ~ 3F_FFFFh
30_0000h ~ 37_FFFFh
28_0000h ~ 2F_FFFFh
20_0000h ~ 27_FFFFh
18_0000h ~ 1F_FFFFh
10_0000h ~ 17_FFFFh
08_0000h ~ 0F_FFFFh
02_0000h ~ 07_FFFFh
01_0000h ~ 01_FFFFh
00_0000h ~ 00_FFFFh
ORP56 ~ 63 in SMECORPR9
ORP48 ~ 55 in SMECORPR8
ORP40 ~ 47 in SMECORPR7
ORP32 ~ 39 in SMECORPR6
ORP24 ~ 31 in SMECORPR5
ORP16 ~ 23 in SMECORPR4
ORP8 ~ 15 in SMECORPR3
ORP2 ~ 7 in SMECORPR2
ORPLA8~15 in SMECORPR1
ORPLA0 ~ 7 in SMECORPR0
ORP56 ~ 63 in SMECOWPR9
ORP48 ~ 55 in SMECOWPR8
ORP40 ~ 47 in SMECOWPR7
ORP32 ~ 39 in SMECOWPR6
ORP24 ~ 31 in SMECOWPR5
ORP16 ~ 23 in SMECOWPR4
ORP8 ~ 15 in SMECOWPR3
ORP2 ~ 7 in SMECOWPR2
ORPLA8 ~ 15 in SMECOWPR1
ORPLA0 ~ 7 in SMECOWPR0
All ranges are write-control by
HOSTWA, too.
Note
Each bit controls
64K bytes
Each bit controls
8K bytes
Table 3-4. Flash Read/Write Protection Controlled by Host Side
Flash Address
Range (byte)
Read Control
Register Bits
Write Control
Register Bits
30_0000h ~ 3F_FFFFh
20_0000h ~ 2F_FFFFh
10_0000h ~ 1F_FFFFh
00_0000h ~ 0F_FFFFh
HRP in SMHAPR4
HRP in SMHAPR3
HRP in SMHAPR2
HRP in SMHAPR1
HRW in SMHAPR4
HRW in SMHAPR3
HRW in SMHAPR2
HRW in SMHAPR1
Note
Each index
controls
64K bytes
www.ite.com.tw
8
IT8510E/TE/G V0.7.2
Share Link: 