IT8510TE View Datasheet(PDF) - ITE Tech. INC.
Part Name
Description
Manufacturer
IT8510TE Datasheet PDF : 284 Pages
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Contents
6.7.4.2
6.7.4.3
6.7.4.1.5 Hours Register (HRREG)............................................................... 119
6.7.4.1.6 Hours Alarm 1 Register (HRA1REG)............................................. 119
6.7.4.1.7 Day Of Week Register (DOWREG) ............................................... 119
6.7.4.1.8 Date Of Month Register (DOMREG).............................................. 120
6.7.4.1.9 Month Register (MONREG) ........................................................... 120
6.7.4.1.10 Year Register (YRREG) ................................................................. 120
6.7.4.1.11 RTC Control Register A (CTLREGA)............................................. 120
6.7.4.1.12 RTC Control Register B (CTLREGB)............................................. 121
6.7.4.1.13 RTC Control Register C (CTLREGC) ............................................ 122
6.7.4.1.14 RTC Control Register D (CTLREGD) ............................................ 123
6.7.4.1.15 Date of Month Alarm 1 Register (DOMA1REG)............................. 123
6.7.4.1.16 Month Alarm 1 Register (MONA1REG) ......................................... 123
RTC Bank 1 Register............................................................................................. 123
6.7.4.2.1 Seconds Alarm 2 Register (SECA2REG) ...................................... 123
6.7.4.2.2 Minutes Alarm 2 Register (MINA2REG) ........................................ 123
6.7.4.2.3 Hours Alarm 2 Register (HRA2REG)............................................. 124
6.7.4.2.4 Date of Month Alarm 2 Register (DOMA2REG)............................. 124
6.7.4.2.5 Month Alarm 2 Register (MONA2REG) ......................................... 124
RTC I/O Register ................................................................................................... 124
6.7.4.3.1 RTC Index Register of Bank 0 (RIRB0) ......................................... 124
6.7.4.3.2 RTC Data Register of Bank 0 (RDRB0)......................................... 124
6.7.4.3.3 RTC Index Register of Bank 1 (RIRB1) ......................................... 125
6.7.4.3.4 RTC Data Register of Bank 1 (RDRB1)......................................... 125
7. EC Domain Functions ................................................................................................................................ 127
7.1 8032 Embedded Controller (EC)..................................................................................................... 127
7.1.1 Overview............................................................................................................................. 127
7.1.2 Features ............................................................................................................................. 127
7.1.3 General Description............................................................................................................ 127
7.1.4 Functional Description....................................................................................................... 127
7.1.5 Memory Organization ......................................................................................................... 128
7.1.6 On-Chip Peripherals........................................................................................................... 129
7.1.7 Timer / Counter................................................................................................................... 131
7.1.8 Idle and Doze/Sleep Mode ................................................................................................. 142
7.1.9 EC Internal Register Description ........................................................................................ 143
7.1.9.1 Port 0 Register (P0R) ............................................................................................ 143
7.1.9.2 Stack Pointer Register (SPR) ................................................................................ 143
7.1.9.3 Data Pointer Low Register (DPLR)........................................................................ 143
7.1.9.4 Data Pointer High Register (DPHR) ...................................................................... 144
7.1.9.5 Data Pointer 1 Low Register (DP1LR)................................................................... 144
7.1.9.6 Data Pointer 1 High Register (DP1HR) ................................................................. 144
7.1.9.7 Data Pointer Select Register (DPSR).................................................................... 144
7.1.9.8 Power Control Register (PCON)............................................................................ 144
7.1.9.9 Timer Control Register (TCON)............................................................................. 146
7.1.9.10 Timer Mode Register (TMOD) ............................................................................... 146
7.1.9.11 Timer 0 Low Byte Register (TL0R) ........................................................................ 147
7.1.9.12 Timer 1 Low Byte Register (TL1R) ........................................................................ 147
7.1.9.13 Timer 0 High Byte Register (TH0R)....................................................................... 147
7.1.9.14 Timer 1 Low Byte Register (TH1R) ....................................................................... 147
7.1.9.15 Clock Control Register (CKCON) .......................................................................... 147
7.1.9.16 Port 1 Register (P1R) ............................................................................................ 148
7.1.9.17 Serial Port Control Register (SCON) ..................................................................... 148
7.1.9.18 Serial Port Buffer Register (SBUFR) ..................................................................... 149
7.1.9.19 Port 2 Register (P2R) ............................................................................................ 149
7.1.9.20 Interrupt Enable Register (IE)................................................................................ 149
7.1.9.21 Port 3 Register (P3R) ............................................................................................ 149
7.1.9.22 Interrupt Priority Register (IP)................................................................................ 150
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IT8510E/TE/G V0.7.2
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