RL56CSM-3 View Datasheet(PDF) - Conexant Systems

Part Name

Description

Manufacturer

RL56CSM-3

AnyPort™ Multi-Service Access Processor

Conexant Systems 

RL56CSMV/3 and RL56CSM/3 Hardware Interface Description

1. INTRODUCTION

1.1 SUMMARY

The RL56CSMV/3 and RL56CSM/3 are members of the CONEXANT™ AnyPort™ family of multi-service access processors,

and provide a complete solution to the transport of multiple media types between circuit-switched remote access and a variety

of back-end networks. AnyPort processors are ideally suited for the network infrastructures resulting from the convergence of

voice and data networking, addressing new requirements such as Voice and Fax over packet networks, ISDN and Cellular

Data, while maintaining support of traditional PSTN Data/Fax needs.

Note: In this document, RL56CSMV/3 and CSMV/3 refer to both RL56CSMV/3 and RL56CSM/3 except as noted. Any

reference to voice applies only to the RL56CSMV/3.

The CSMV/3 transcends existing modem solutions by providing a complete system solution for multi-service remote access.

The combined DSP/RISC architecture provides an ideal engine to run CONEXANT’s extensive suite of field-proven

modulations, echo cancellers, voice coders, and communications protocols. In addition, performing functions such as T.38,

V.120, async to sync HDLC conversion for PPP, V.110, and synchronous HDLC for PPP on ISDN connections, in the access

processor allows system designers to reduce system overhead and increase scalability.

The CSMV/3 is a low-power system providing three communication channels in a single package. Powerful and downloadable

DSP-based data pumps employ on-chip SRAM to allow upgrades to future voice and communication modulation schemes. An

advanced RISC microcontroller manages three data pumps simultaneously. An innovative host interface to the Multi-Service

Access Processor system uses a shared SDRAM memory to increase data throughput while reducing system cost and space.

A programmable time slot selection feature provides direct digital connection to a T1/E1/PRI framing device.

A 35mm BGA package houses the CSMV/3 with extra balls available for thermal vias to minimize heat. A built-in phase lock

loop (PLL) minimizes board noise while easing design. A quick-wake, sleep mode further reduces the power of this +3.3V

access processor system.

This Hardware Interface Description describes the modem hardware capabilities. AT commands and S registers are defined

in the AT Command Reference Manual (Order No. 1195). Additional information is described in the Software Interface

Description (Order No. 1148) and the RL56DDP Modem Designer’s Guide (Order No. 1141).

Table 1-1. RL56CSMV/3 and RL56CSM/3 Models and Functions

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