APA300-CG View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

APA300-CG

ProASIC PLUS® Flash Family FPGAs

Unspecified 

Off chip

On chip

/1

Global MUX B

OUT

÷n

133 MHz

÷m

180˚

PLL Core

0˚

ProASICPLUS Flash Family FPGAs

÷u

D

GL

B

/1

External

D

Feedback

Global MUX A

OUT

D

133 MHz

÷v

D

GL

A

Reference

clock

Q SET D

Q

CLR

Figure 1-20 • Using the PLL for Clock Deskewing

v5.7

1-19

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