LPC47N237-MD View Datasheet(PDF) - SMSC -> Microchip
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Description
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LPC47N237-MD Datasheet PDF : 138 Pages
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3.3v I/O Controller for Port Replicators and Docking Stations
8.1.9 Modem Status Register (MSR) ...............................................................................................................37
8.1.10 Scratchpad Register (SCR).................................................................................................................38
8.2 Programmable Baud Rate Generator (AND Divisor Latches DLH, DLL) ......................................... 38
8.3 Effect Of The Reset on Register File ................................................................................................ 38
8.4 FIFO Interrupt Mode Operation......................................................................................................... 38
8.5 FIFO Polled Mode Opertion .............................................................................................................. 39
8.6 Notes On Serial Port Operation ........................................................................................................ 42
8.6.1 FIFO Mode Operation.............................................................................................................................42
8.6.2 TX AND RX FIFO Operation...................................................................................................................42
Chapter 9 Parallel Port........................................................................................................................ 44
9.1 IBM XT/AT Compatible, Bi-Directional And EPP Modes .................................................................. 45
9.1.1 Data Port ................................................................................................................................................45
9.1.2 Status Port..............................................................................................................................................45
9.1.3 Control Port ............................................................................................................................................46
9.1.4 EPP Address Port...................................................................................................................................47
9.1.5 EPP Data Port 0 .....................................................................................................................................47
9.1.6 EPP Data Port 1 .....................................................................................................................................48
9.1.7 EPP Data Port 2 .....................................................................................................................................48
9.1.8 EPP Data Port 3 .....................................................................................................................................48
9.2 EPP 1.9 Operation ............................................................................................................................ 48
9.2.1 Software Constraints ..............................................................................................................................48
9.2.2 EPP 1.9 Write .........................................................................................................................................48
9.2.3 EPP 1.9 Read .........................................................................................................................................49
9.3 EPP 1.7 Operation ............................................................................................................................ 50
9.3.1 Software Constraints ..............................................................................................................................50
9.3.2 EPP 1.7 Write .........................................................................................................................................50
9.3.3 EPP 1.7 Read .........................................................................................................................................50
9.4 Extended Capabilities Parallel Port................................................................................................... 51
9.5 Vocabulary ........................................................................................................................................ 51
9.6 ECP Implementation Standard.......................................................................................................... 53
9.6.1 Description..............................................................................................................................................53
9.6.2 Register Definitions.................................................................................................................................54
Data And ecpAFifo Port.....................................................................................................................................55
Device Status Register (DSR) ...........................................................................................................................55
Device Control Register (DCR)..........................................................................................................................56
cFifo (Parallel Port Data FIFO) ..........................................................................................................................57
ecpDFifo (ECP Data FIFO)................................................................................................................................57
tFifo (Test FIFO Mode) ......................................................................................................................................57
cnfgA (Configuration Register A) .......................................................................................................................58
cnfgB (Configuration Register B) .......................................................................................................................58
ecr (Extended Control Register) ........................................................................................................................58
9.6.3 Operation................................................................................................................................................61
Mode Switching/Software Control .....................................................................................................................61
ECP Operation ..................................................................................................................................................61
Termination from ECP Mode .............................................................................................................................61
Command/Data .................................................................................................................................................62
Data Compression.............................................................................................................................................62
Pin Definition .....................................................................................................................................................62
LPC Connections...............................................................................................................................................62
Interrupts ...........................................................................................................................................................63
FIFO Operation .................................................................................................................................................63
DMA Transfers ..................................................................................................................................................63
DMA Mode - Transfers from the FIFO to the Host.............................................................................................64
Programmed I/O Mode or Non-DMA Mode .......................................................................................................64
Programmed I/O - Transfers from the FIFO to the Host ....................................................................................64
Programmed I/O - Transfers from the Host to the FIFO ....................................................................................65
Chapter 10 Power Management ........................................................................................................ 66
Revision 0.3 (10-26-04)
Page 4
DATASHEET
SMSC DS – LPC47N237
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