CXD2529Q View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXD2529Q

CD Digital Signal Processor

Sony Semiconductor 

CXD2529Q

CD Digital Signal Processor

For the availability of this product, please contact the sales office.

Description

The CXD2529Q is a digital signal processor LSI for

CD players and is equipped with built-in digital filters,

zero detection circuit, 1-bit DAC, and analog low-

pass filter on a single chip.

100 pin QFP (Plastic)

Features

Digital Signal Processor (DSP) Block

• Playback mode supporting CAV (Constant Angular

Velocity)

– Frame jitter-free

– Allows 0.5 to double-speed continuous playback

– Allows relative rotational velocity readout

– Supports external spindle control

• Wide capture range mode

– Spindle rotational velocity following method

– Supports normal-speed and double-speed playback

• 16K RAM

• EFM data demodulation

• Enhanced EFM frame sync signal protection

• SEC strategy-based error correction

• Subcode demodulation and Sub Q data error detection

• Digital spindle servo

• 16-bit traverse counter

• Asymmetry compensation circuit

• Serial bus-based CPU interface

• Error correction monitor signals, etc. are output

from a new CPU interface.

• Servo auto sequencer

• Digital audio interface output

• Digital peak meter

Digital Filter, DAC, Analog Low-Pass Filter Block

• DBB (Digital Bass Boost)

• Supports double-speed playback

• Digital de-emphasis

• Digital attenuation function

• Zero detection function

• 8fs oversampling digital filter

• S/N ratio: 100dB or more (master clock: 384fs typ.)

Logical value: 109dB

• THD + N: 0.007% or less (master clock: 384fs typ.)

• Rejection band attenuation: –60dB or more

Applications

CD players

Absolute Maximum Ratings

• Supply voltage

VDD –0.3 to +7.0 V

• Input voltage

VI

–0.3 to +7.0 V

(Vss – 0.3V to VDD + 0.3V)

• Output voltage

VO –0.3 to +7.0 V

• Storage temperature Tstg –40 to +125 °C

• Supply voltage difference

VSS – AVSS –0.3 to +0.3 V

VDD – AVDD –0.3 to +0.3 V

Note) AVDD includes XVDD, and AVSS includes XVSS.

Recommended Operating Conditions

• Supply voltage

VDD 3.4 to 5.25

V

• Operating temperature Topr –20 to +75 °C

Note) The VDD (min.) for the CXD2519Q varies

according to the playback speed selection.

Playback

VDD (min.) [V]

speed

CD-DSP block DAC block

×2

3.4V

4.5V

×1

3.4V

3.4V

× 1∗1

3.4V

∗1 When the internal operation of the CD-DSP

side is set to double-speed mode and the

crystal oscillation frequency is halved,

normal-speed playback results.

Input/Output Capacitances

• Input pin

CI

• Output pin

CO

Note) Measurement conditions

12 (max.) pF

12 (max.) pF

VDD = VI = 0V

fM = 1MHz

Structure

Silicon gate CMOS IC

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by

any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the

operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

–1–

E96651A73

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