CXD2529Q View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXD2529Q

CD Digital Signal Processor

Sony Semiconductor 

CXD2529Q

7. Setting Method of the CXD2529Q Playback Speed (in CLV-N mode)

(A) CD-DSP block

The playback modes shown below can be selected by the combination of the crystal, XTSL pin and $9X

command DSPB.

CD-DSP block playback speed

Crystal

768Fs

768Fs

384Fs

384Fs

384Fs

XTSL

1

1

0

0

1

DSPB

0

1

0

1

1

CD-DSP block playback speed

×1

×2

×1

×2

× 1∗1

Fs = 44.1kHz

∗1 Low power consumption mode. The CD-DSP processing speed is halved, allowing the power

consumption to be decreased.

(B) 1-bit DAC block

The operating speed of the DAC block is determined by the crystal and the $9X command MCSL

regardless of the operating conditions of the CD-DSP block mentioned above. This allows the playback

mode for the DAC block and CD-DSP block to be set independently.

1-bit DAC block playback speed

Crystal

MCSL

768Fs

1

768Fs

0

384Fs

0

Fs = 44.1kHz

DAC block playback speed

×1

×2

×1

– 62 –

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