NT6868C View Datasheet(PDF) - Novatek Microelectronics
Part Name
Description
Manufacturer
NT6868C Datasheet PDF : 15 Pages
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Block Diagram
NT6868C
TIMING GENERATOR
(RC OSC/Ceramic Resonator: 4MHz)
4K BYTES
ROM
6502
CPU
RESET
VDD
GND
INT. CONTROLLER
POWER-ON RESET/
LOW VOLTAGE RESET
128 BYTES
SRAM + STACK
WATCH DOG
TIMER
BASE TIMER
I/O PORTS
CLK
DATA
LED0
LED1
LED2
P00 - P07
P10 - P17
P20 - P27
P30 - P34
Pin and Pad Descriptions
Pin No. Pad No. Designation I/O
Description
1
1
GND
P
Ground pin
2
2
NC
-
No connection, recommended to connect VDD or floating
3
3
DATA
I/O I/O, 10KΩ pull-up resistor for communication
4
4
CLK
I/O I/O, 10KΩ pull-up resistor for communication
5 - 9,
11 - 34
5 - 9,
11 - 34
P30 - P34,
P00 - P27
I/O Bi-directional I/O pins
10
10
RESET
I
RESET signal input pin with internal pull-up resistor; Active low
35 - 37 35 - 37
LED0 -
LED2
O
LED direct sink pins
38
38
VDD
P
Power supply
39
39
R/OSCO
I
47KΩ resistor connected for RC OSC or 4MHz ceramic resonator
connection
40
40
OSCI
-
No connection for RC OSC connection; for 4MHz ceramic resonator
* Under the constraint of the maximum frequency variation, (∆F/F)max, ≤ ±1%, code 3, 7 (ceramic resonator option) must
be selected while pins 39 and 40 are connected to a ceramic resonator. If (∆F/F)max, ≤ ±10%, code 1, 5 (RC OSC option),
then it is recommended to be selected. Also, connect pin 39 a 47KΩ resistor with, ≤ ±1% accuracy to VDD while pin 40 is
floating.
2
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