KSZ8765CLX View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
KSZ8765CLX
Microchip Technology
KSZ8765CLX Datasheet PDF : 131 Pages
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KSZ8765CLX
TABLE 2-1: SIGNALS - KSZ8765CLX (CONTINUED)
Pin
Number
26
27
28
Pin
Name
VDD12D
GNDD
LED4_1
29
TXEN5/
TXD5_CTL
30
TXD5_0
31
LED4_0
32
TXD5_1
33
GNDD
34
VDDIO
35
TXD5_2
36
TXD5_3
37
TXER5
38
TXD5_4
39
TXD5_5
40
TXD5_6
41
TXD5_7
42
VDD12D
43
TXC5/
REFCLKI/
GTXC5
44
RXC5/
GRXC5
Type
Note 2-1
P
GND
Ipu/O
Ipd
Ipd
Ipu/O
Ipd
GND
P
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd
P
I/O
I/O
Port
Description
— 1.2V Core Power.
— Digital Ground.
4
Port 4 LED Indicator 1:
See Global Register 11 bits [5:4] for details.
5
GMII/MII/RMII: Port 5 Switch transmit enable.
RGMII: Transmit data control.
5
GMII/RGMII/MII/RMII: Port 5 switch transmit Bit[0].
4
Port 4 LED Indicator 0:
See Global Register 11 bits [5:4] for details.
5
GMII/RGMII/MII/RMII: Port 5 switch transmit Bit[1].
— Digital Ground.
— 3.3V, 2.5V, or 1.8V digital VDD for digital I/O circuitry.
5
GMII/RGMII/MII: Port 5 switch transmit Bit[2].
RMII: No connection.
5
GMII/RGMII/MII: Port 5 switch transmit Bit[3].
RMII: No connection.
5
GMII/MII: Port 5 switch transmit error.
RGMII/RMII: No connection.
5
GMII: Port 5 switch transmit Bit[4].
RGMII/MII/RMII: No connection.
5
GMII: Port 5 switch transmit Bit[5].
RGMII/MII/RMII: No connection.
5
GMII: Port 5 switch transmit Bit[6].
RGMII/MII/RMII: No connection.
5
GMII: Port 5 Switch transmit Bit[7].
RGMII/MII/RMII: No connection.
— 1.2V Core Power.
5
Port 5 Switch GMAC5 Clock Pin:
MII: 2.5/25 MHz clock, PHY mode is output, MAC mode is input.
RMII: Input for receiving 50 MHz clock in normal mode
GMII: Input 125 MHz clock for the transmit
RGMII: Input 125 MHz clock with falling and rising edge to latch
data for the transmit.
5
Port 5 Switch GMAC5 Clock Pin:
MII: 2.5/25 MHz clock, PHY mode is output, MAC mode is input.
RMII: Output 50 MHz reference clock for the receiving/transmit
in the clock mode.
GMII: Output 125 MHz clock for the receiving.
RGMII: Output 125 MHz clock with falling and rising edge to
latch data for the receiving.
DS00002130A-page 8
2016 Microchip Technology Inc.
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