W971GG6KB View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

W971GG6KB

8M x 8 BANKS x 16 BIT DDR2 SDRAM

Winbond 

W971GG6KB

4. KEY PARAMETERS

SYM.

SPEED GRADE

Bin(CL-tRCD-tRP)

Part Number Extension

@CL = 7

@CL = 6

tCK(avg) Average clock period

@CL = 5

@CL = 4

@CL = 3

tRCD

tRP

tRC

tRAS

IDD0

IDD1

IDD4R

IDD4W

IDD5B

IDD6

IDD7

Active to Read/Write Command Delay Time

Precharge to Active Command Period

Active to Ref/Active Command Period

Active to Precharge Command Period

Operating one bank active-precharge current

Operating one bank active-read-precharge current

Operating burst read current

Operating burst write current

Burst refresh current

Self refresh current (TCASE ≤ 85°C)

Operating bank interleave read current

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Min.

Min.

Min.

Max.

Max.

Max.

Max.

Max.

Max.

Max.

DDR2-1066

7-7-7

-18

1.875 nS

7.5 nS

2.5 nS

7.5 nS

3 nS

7.5 nS

3.75 nS

7.5 nS





13.125 nS

13.125 nS

58.125 nS

45 nS

75 mA

90 mA

145 mA

155 mA

145 mA

8 mA

190 mA

DDR2-800

5-5-5/6-6-6

-25/25I





2.5 nS

8 nS

2.5 nS

8 nS

3.75 nS

8 nS

5 nS

8 nS

12.5 nS

12.5 nS

57.5 nS

45 nS

70 mA

85 mA

120 mA

130 mA

130 mA

8 mA

185 mA

DDR2-667

5-5-5

-3









3 nS

8 nS

3.75 nS

8 nS

5 nS

8 nS

15 nS

15 nS

60 nS

45 nS

65 mA

80 mA

105 mA

110 mA

120 mA

8 mA

160 mA

Publication Release Date: Sep. 11, 2013

-5-

Revision A03

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