ADF7021
Preliminary Technical Data
OUTLINE DIMENSIONS
7.00
BSC SQ
PIN 1
INDICATOR
TOP
VIEW
0.60 MAX
0.60 MAX
37
36
0.30
0.23
0.18
48
1
6.75
BSC SQ
EXPOSED
PAD
(BOTTOM VIEW)
1.00 12° MAX
0.85
0.80
SEATING
PLANE
0.50
0.40
25
12
0.30
24
13
0.80 MAX
0.65 TYP
0.50 BSC
0.05 MAX
0.02 NOM
0.20 REF
COPLANARITY
0.08
5.50
REF
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
Figure 48. 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
7 × 7 mm Body, Very Thin Quad
(CP-48-3)
Dimensions shown in millimeters
PIN 1
INDICATOR
4.25
4.10 SQ
3.95
0.25 MIN
ORDERING GUIDE
Model
ADF7021BCPZ1
EVAL-ADF70XXMB
EVAL-ADF70XXMB2
EVAL-ADF7021DB2
EVAL-ADF7021DB3
1 Z = Pb-free part.
Temperature Range
−40°C to +85°C
Package Description
48-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Control Mother Board
Evaluation Platform
860 MHz to 870 MHz Daughter Board
431 MHz to 470 MHz Daughter Board
Package Option
CP-48-3
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
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PR05876-0-9/06(PrI)
Rev. PrI | Page 44 of 44